NXP 68HC705X32 Reference guide

WWW.MOTOROLA.COM/SEMICONDUCTORS

M68HC05

Microcontrollers

M68HC05AG/D

Rev. 4, 3/2002

M68HC05

Applications Guide

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M68HC05 Applications Guide — Rev. 4.0

MOTOROLA Applications Guide 3

M68HC05

Applications Guide

To provide the most up-to-date information, the revision of our

documents on the World Wide Web will be the most current. Your printed

copy may be an earlier revision. To verify you have the latest information

available, refer to:

http://www.motorola.com/semiconductors/

The following revision history table summarizes changes contained in

this document. For your convenience, the page number designators

have been linked to the appropriate location.

Motorola and the Stylized M Logo are registered trademarks of Motorola, Inc.

DigitalDNA is a trademark of Motorola, Inc. © Motorola, Inc., 1989, 1996, 2002

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Revision History

M68HC05 Applications Guide — Rev. 4.0

4 Applications Guide MOTOROLA

NOTE: As this document was originally released in 1989, there have been some

changes in Motorola’s procedures. For example, there are references in

this document to an electronic bulletin board system (BBS) for freeware.

BBS has been replaced with the World Wide Web. For freeware and any

other referenced documentation please refer to:

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Revision History

Date

Revision

Level

Description

Page

Number(s)

April, 1997 3.0 Format and organizational changes Throughout

March, 2002 4.0

Updated to current publication styles

Appendix A. Instruction Set Details — Corrected

Boolean formulae for compare accumulator with

memory (CMP) instruction

270

Appendix A. Instruction Set Details — Corrected

Boolean formulae for subtract (SUB) instruction

297

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M68HC05 Applications Guide — Rev. 4.0

MOTOROLA List of Sections 5

Applications Guide — M68HC05

List of Sections

Section 1. General Description . . . . . . . . . . . . . . . . . . . .21

Section 2. Microcontroller Operation . . . . . . . . . . . . . . .29

Section 3. MC68HC705C8 Functional Data. . . . . . . . . . .73

Section 4. Applications. . . . . . . . . . . . . . . . . . . . . . . . . .187

Appendix A. Instruction Set Details . . . . . . . . . . . . . . .233

Appendix B. Review Questions . . . . . . . . . . . . . . . . . . .303

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List of Sections

M68HC05 Applications Guide — Rev. 4.0

6 List of Sections MOTOROLA

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M68HC05 Applications Guide — Rev. 4.0

MOTOROLA Table of Contents 7

Applications Guide — M68HC05

Table of Contents

Section 1. General Description

1.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

1.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

1.3 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

1.4 Background. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

1.5 Computer Systems Description . . . . . . . . . . . . . . . . . . . . . . . .24

1.6 Microcontroller Applications Overview . . . . . . . . . . . . . . . . . . .26

1.7 Project Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Section 2. Microcontroller Operation

2.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

2.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

2.3 Number Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

2.4 Computer Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

2.4.1 Computer Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

2.4.2 Computer Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

2.4.3 CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38

2.4.4 Memory Uses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40

2.4.5 Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

2.5 Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

2.6 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

2.6.1 Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

2.6.2 Mnemonic Source Code. . . . . . . . . . . . . . . . . . . . . . . . . . . .46

2.6.3 Software Delay Program . . . . . . . . . . . . . . . . . . . . . . . . . . .49

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2.6.4 Assembler Listing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

2.6.5 CPU View of a Program. . . . . . . . . . . . . . . . . . . . . . . . . . . .54

2.7 CPU Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

2.7.1 Detailed Operation of CPU Instructions . . . . . . . . . . . . . . . .55

2.7.1.1 Store Accumulator (Direct Addressing Mode) . . . . . . . . .57

2.7.1.2 Load Accumulator (Immediate Addressing Mode). . . . . .58

2.7.1.3 Conditional Branch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59

2.7.1.4 Subroutine Calls and Returns . . . . . . . . . . . . . . . . . . . . .60

2.7.2 Playing Computer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

2.8 On-Chip Peripherals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

2.8.1 Serial Communications Interface (SCI) . . . . . . . . . . . . . . . .70

2.8.2 Serial Peripheral Interface (SPI). . . . . . . . . . . . . . . . . . . . . .70

2.8.3 16-Bit Timer System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71

2.8.4 Memory Peripherals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72

2.8.5 Other On-Chip Peripherals. . . . . . . . . . . . . . . . . . . . . . . . . .72

Section 3. MC68HC705C8 Functional Data

3.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73

3.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76

3.3 MCU Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

3.3.1 Hardware Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

3.3.2 Software Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78

3.3.3 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78

3.4 Pins and Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80

3.4.1 Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81

3.4.1.1 V

DD

and V

SS

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81

3.4.1.2 V

PP

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81

3.4.1.3 IRQ (Maskable Interrupt Request). . . . . . . . . . . . . . . . . .82

3.4.1.4 RESET. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82

3.4.1.5 TCAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82

3.4.1.6 TCMP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83

3.4.1.7 OSC1 and OSC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83

3.4.1.8 PA7–PA0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83

3.4.1.9 PB7–PB0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83

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3.4.1.10 PC7–PC0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85

3.4.1.11 PD5–PD0 and PD7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85

3.4.2 Typical Basic Connections . . . . . . . . . . . . . . . . . . . . . . . . . .85

3.5 On-Chip Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87

3.5.1 Memory Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87

3.5.2 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88

3.6 Central Processor Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88

3.6.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90

3.6.1.1 Accumulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90

3.6.1.2 Index Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91

3.6.1.3 Condition Code Register . . . . . . . . . . . . . . . . . . . . . . . . .91

3.6.1.4 Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93

3.6.1.5 Stack Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94

3.6.2 Arithmetic/Logic Unit (ALU) . . . . . . . . . . . . . . . . . . . . . . . . .94

3.6.3 CPU Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95

3.6.4 Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95

3.6.4.1 Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95

3.6.4.2 Computer Operating Properly (COP)

Watchdog Timer Reset . . . . . . . . . . . . . . . . . . . . . . . .97

3.6.4.3 Clock Monitor Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . .99

3.7 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99

3.7.1 Inherent Addressing Mode. . . . . . . . . . . . . . . . . . . . . . . . .101

3.7.2 Immediate Addressing Mode . . . . . . . . . . . . . . . . . . . . . . .103

3.7.3 Extended Addressing Mode. . . . . . . . . . . . . . . . . . . . . . . .104

3.7.4 Direct Addressing Mode. . . . . . . . . . . . . . . . . . . . . . . . . . .105

3.7.5 Indexed Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . .108

3.7.5.1 Indexed, No Offset. . . . . . . . . . . . . . . . . . . . . . . . . . . . .108

3.7.5.2 Indexed, 8-Bit Offset . . . . . . . . . . . . . . . . . . . . . . . . . . .110

3.7.5.3 Indexed, 16-Bit Offset . . . . . . . . . . . . . . . . . . . . . . . . . .112

3.7.6 Relative Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . .113

3.7.7 Bit Test and Branch Instructions . . . . . . . . . . . . . . . . . . . .115

3.7.8 Instructions Organized by Type . . . . . . . . . . . . . . . . . . . . .115

3.8 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . .119

3.9 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128

3.9.1 Software Interrupt (SWI). . . . . . . . . . . . . . . . . . . . . . . . . . .129

3.9.2 External Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131

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10 Table of Contents MOTOROLA

3.9.3 Timer Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132

3.9.4 Serial Communications Interface (SCI) Interrupt . . . . . . . .132

3.9.5 Serial Peripheral Interface (SPI Interrupt . . . . . . . . . . . . . .132

3.10 Microcontroller Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . .133

3.10.1 Parallel I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133

3.10.2 Serial I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136

3.11 Serial Communications Interface (SCI) . . . . . . . . . . . . . . . . .136

3.11.1 SCI Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137

3.11.2 SCI Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139

3.11.3 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141

3.11.3.1 Baud Rate Register (BAUD) . . . . . . . . . . . . . . . . . . . . .141

3.11.3.2 Serial Communications Control

Register One (SCCR1) . . . . . . . . . . . . . . . . . . . . . . .144

3.11.3.3 Serial Communications Control

Register Two (SCCR2) . . . . . . . . . . . . . . . . . . . . . . .144

3.11.3.4 Serial Communications Status

Register (SCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . .145

3.11.3.5 Serial Communications Data Register (SCDAT) . . . . . .146

3.11.4 Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .147

3.11.5 Hardware Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . .148

3.11.6 Software Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148

3.11.6.1 Initialization Procedure. . . . . . . . . . . . . . . . . . . . . . . . . .148

3.11.6.2 Normal Transmit Operation . . . . . . . . . . . . . . . . . . . . . .149

3.11.6.3 Normal Receive Operation. . . . . . . . . . . . . . . . . . . . . . .149

3.11.7 SCI Application Example . . . . . . . . . . . . . . . . . . . . . . . . . .150

3.12 Synchronous Serial Peripheral Interface (SPI). . . . . . . . . . . .153

3.12.1 Data Movement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .155

3.12.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .156

3.12.3 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156

3.12.3.1 Serial Data Pins (MISO, MOSI) . . . . . . . . . . . . . . . . . . .156

3.12.3.2 Serial Clock (SCK). . . . . . . . . . . . . . . . . . . . . . . . . . . . .157

3.12.3.3 Slave Select (SS

). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158

3.12.4 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158

3.12.4.1 Serial Peripheral Control Register (SPCR) . . . . . . . . . .158

3.12.4.2 Serial Peripheral Status Register (SPSR) . . . . . . . . . . .160

3.12.4.3 Serial Peripheral Data I/O Register (SPDR) . . . . . . . . .161

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3.13 SPI Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . .161

3.14 Programmable Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163

3.14.1 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .166

3.14.2 Timer Counter and Alternate Counter Registers . . . . . . . .168

3.14.3 Input-Capture Concept. . . . . . . . . . . . . . . . . . . . . . . . . . . .169

3.14.4 Input-Capture Operation. . . . . . . . . . . . . . . . . . . . . . . . . . .170

3.14.5 Output-Compare Concept . . . . . . . . . . . . . . . . . . . . . . . . .172

3.14.6 Output-Compare Operation . . . . . . . . . . . . . . . . . . . . . . . .174

3.14.7 Timer Control Register (TCR) . . . . . . . . . . . . . . . . . . . . . .175

3.14.8 Timer Status Register (TSR) . . . . . . . . . . . . . . . . . . . . . . .175

3.14.9 Timer Application Example. . . . . . . . . . . . . . . . . . . . . . . . .177

3.15 STOP/WAIT Instruction Effects . . . . . . . . . . . . . . . . . . . . . . .177

3.15.1 Low Power-Consumption Modes . . . . . . . . . . . . . . . . . . . .177

3.15.2 Effects on On-Chip Peripherals . . . . . . . . . . . . . . . . . . . . .180

3.15.2.1 Timer Action During Stop Mode. . . . . . . . . . . . . . . . . . .180

3.15.2.2 SCI Action During Stop Mode . . . . . . . . . . . . . . . . . . . .180

3.15.2.3 SPI Action During Stop Mode . . . . . . . . . . . . . . . . . . . .181

3.15.2.4 Wait Mode Effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . .181

3.16 OTPROM/EPROM Programming. . . . . . . . . . . . . . . . . . . . . .182

3.16.1 Erasing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182

3.16.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182

3.16.3 Program Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183

3.16.4 Option Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184

Section 4. Applications

4.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .187

4.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .187

4.3 Hardware Development Methods. . . . . . . . . . . . . . . . . . . . . .189

4.4 Software Development Methods. . . . . . . . . . . . . . . . . . . . . . .191

4.4.1 Freeware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193

4.4.2 Third-Party Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . .194

4.5 Thermostat Project Details . . . . . . . . . . . . . . . . . . . . . . . . . . .196

4.5.1 Hardware Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .197

4.5.2 Project Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200

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Appendix A. Instruction Set Details

A.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .233

A.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .235

A.3 M68HC05 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . .237

ADC — Add with Carry. . . . . . . . . . . . . . . . . . . . . . . . . . . 238

ADD — Add without Carry . . . . . . . . . . . . . . . . . . . . . . . . 239

AND — Logical AND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240

ASL — Arithmetic Shift Left . . . . . . . . . . . . . . . . . . . . . . . 241

ASR — Arithmetic Shift Right. . . . . . . . . . . . . . . . . . . . . . 242

BCC — Branch if Carry Clear. . . . . . . . . . . . . . . . . . . . . . 243

BCLR n — Clear Bit in Memory . . . . . . . . . . . . . . . . . . . . 244

BCS — Branch if Carry Set . . . . . . . . . . . . . . . . . . . . . . . 245

BEQ — Branch if Equal . . . . . . . . . . . . . . . . . . . . . . . . . . 246

BHCC — Branch if Half Carry Clear. . . . . . . . . . . . . . . . . 247

BHCS — Branch if Half Carry Set . . . . . . . . . . . . . . . . . . 248

BHI — Branch if Higher . . . . . . . . . . . . . . . . . . . . . . . . . . 249

BHS — Branch if Higher or Same . . . . . . . . . . . . . . . . . . 250

BIH — Branch if Interrupt Pin is High. . . . . . . . . . . . . . . . 251

BIL — Branch if Interrupt Pin is Low . . . . . . . . . . . . . . . . 252

BIT — Bit Test Memory with Accumulator . . . . . . . . . . . . 253

BLO — Branch if Lower . . . . . . . . . . . . . . . . . . . . . . . . . . 254

BLS — Branch if Lower or Same . . . . . . . . . . . . . . . . . . . 255

BMC — Branch if Interrupt Mask is Clear . . . . . . . . . . . . 256

BMI — Branch if Minus. . . . . . . . . . . . . . . . . . . . . . . . . . . 257

BMS — Branch if Interrupt Mask is Set . . . . . . . . . . . . . . 258

BNE — Branch if Not Equal . . . . . . . . . . . . . . . . . . . . . . . 259

BPL — Branch if Plus. . . . . . . . . . . . . . . . . . . . . . . . . . . . 260

BRA — Branch Always. . . . . . . . . . . . . . . . . . . . . . . . . . . 261

BRCLR n — Branch if Bit n is Clear. . . . . . . . . . . . . . . . . 262

BRN — Branch Never . . . . . . . . . . . . . . . . . . . . . . . . . . . 263

BRSET n — Branch if Bit n is Set . . . . . . . . . . . . . . . . . . 264

BSET n — Set Bit in Memory. . . . . . . . . . . . . . . . . . . . . . 265

BSR — Branch to Subroutine. . . . . . . . . . . . . . . . . . . . . . 266

CLC — Clear Carry Bit. . . . . . . . . . . . . . . . . . . . . . . . . . . 267

CLI — Clear Interrupt Mask Bit . . . . . . . . . . . . . . . . . . . . 268

CLR — Clear . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269

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Table of Contents

M68HC05 Applications Guide — Rev. 4.0

MOTOROLA Table of Contents 13

CMP — Compare Accumulator with Memory. . . . . . . . . . 270

COM — Complement. . . . . . . . . . . . . . . . . . . . . . . . . . . . 271

CPX — Compare Index Register with Memory . . . . . . . . 272

DEC — Decrement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273

EOR — Exclusive-OR Memory with Accumulator . . . . . . 274

INC — Increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275

JMP — Jump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276

JSR — Jump to Subroutine . . . . . . . . . . . . . . . . . . . . . . . 277

LDA — Load Accumulator from Memory . . . . . . . . . . . . . 278

LDX — Load Index Register from Memory . . . . . . . . . . . 279

LSL — Logical Shift Left. . . . . . . . . . . . . . . . . . . . . . . . . . 280

LSR — Logical Shift Right . . . . . . . . . . . . . . . . . . . . . . . . 281

MUL — Multiply Unsigned . . . . . . . . . . . . . . . . . . . . . . . . 282

NEG — Negate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283

NOP — No Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 284

ORA — Inclusive-OR . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285

ROL — Rotate Left thru Carry . . . . . . . . . . . . . . . . . . . . . 286

ROR — Rotate Right thru Carry. . . . . . . . . . . . . . . . . . . . 287

RSP — Reset Stack Pointer. . . . . . . . . . . . . . . . . . . . . . . 288

RTI — Return from Interrupt. . . . . . . . . . . . . . . . . . . . . . . 289

RTS — Return from Subroutine. . . . . . . . . . . . . . . . . . . . 290

SBC — Subtract with Carry . . . . . . . . . . . . . . . . . . . . . . . 291

SEC — Set Carry Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292

SEI — Set Interrupt Mask Bit . . . . . . . . . . . . . . . . . . . . . . 293

STA — Store Accumulator in Memory . . . . . . . . . . . . . . . 294

STOP — Enable IRQ, Stop Oscillator . . . . . . . . . . . . . . . 295

STX — Store Index Register X in Memory. . . . . . . . . . . . 296

SUB — Subtract. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297

SWI — Software Interrupt . . . . . . . . . . . . . . . . . . . . . . . . 298

TAX — Transfer Accumulator to Index Register . . . . . . . 299

TST — Test for Negative or Zero. . . . . . . . . . . . . . . . . . . 300

TXA — Transfer Index Register to Accumulator . . . . . . . 301

WAIT — Enable Interrupt, Stop Processor. . . . . . . . . . . . 302

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Table of Contents

M68HC05 Applications Guide — Rev. 4.0

14 Table of Contents MOTOROLA

Appendix B. Review Questions

B.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .303

B.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .303

B.3 Review Questions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .304

B.4 Review Questions, Answers, and Explanations . . . . . . . . . . .318

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M68HC05 Applications Guide — Rev. 4.0

MOTOROLA List of Figures 15

Applications Guide — M68HC05

List of Figures

Figure Title Page

1-1 A Typical Computer System. . . . . . . . . . . . . . . . . . . . . . . . . . .24

1-2 A Temperature Control Flowchart. . . . . . . . . . . . . . . . . . . . . . .26

1-3 Thermostat Project Block Diagram. . . . . . . . . . . . . . . . . . . . . .28

2-1 MCU Expanded Block Diagram . . . . . . . . . . . . . . . . . . . . . . . .31

2-2 M68HC05 CPU Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

2-3 Memory and I/O Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

2-4 Typical Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

2-5 Example Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47

2-6 Flowchart and Mnemonics . . . . . . . . . . . . . . . . . . . . . . . . . . . .48

2-7 Delay Routine Flowchart and Mnemonics . . . . . . . . . . . . . . . .49

2-8 Explanation of Assembler Listing . . . . . . . . . . . . . . . . . . . . . . .51

2-9 Assembler Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

2-10 Memory Map of Example Program . . . . . . . . . . . . . . . . . . . . .56

2-11 Subroutine Call Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . .61

2-12 Playing Computer Worksheet . . . . . . . . . . . . . . . . . . . . . . . . .64

2-13 Completed Worksheet. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66

3-1 MC68HC705C8 Microcontroller Block Diagram . . . . . . . . . . . .79

3-2 40-Pin Dual-In-Line Package Pin Assignments . . . . . . . . . . . .80

3-3 44-Lead PLCC Package Pin Assignments. . . . . . . . . . . . . . . .81

3-4 Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84

3-5 Typical Basic Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . .86

3-6 M68HC05 CPU Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . .88

3-7 MC68HC705C8 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . .89

3-8 Programming Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90

3-9 Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90

3-10 Index Register (X) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91

3-11 Condition Code Register (CCR) . . . . . . . . . . . . . . . . . . . . . . .91

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List of Figures

M68HC05 Applications Guide — Rev. 4.0

16 List of Figures MOTOROLA

Figure Title Page

3-12 Program Counter (PC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93

3-13 Stack Pointer (SP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94

3-14 Hardware Interrupt Flowchart . . . . . . . . . . . . . . . . . . . . . . . .130

3-15 Interrupt Stacking Order . . . . . . . . . . . . . . . . . . . . . . . . . . . .131

3-16 Port A and Data Direction A Registers . . . . . . . . . . . . . . . . .134

3-17 Port B and Data Direction B Registers . . . . . . . . . . . . . . . . .134

3-18 Port C and Data Direction C Registers . . . . . . . . . . . . . . . . .134

3-19 Parallel Port I/O Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . .135

3-20 Port D Fixed Input Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136

3-21 SCI Transmitter Block Diagram. . . . . . . . . . . . . . . . . . . . . . .138

3-22 SCI Receiver Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . .140

3-23 Baud Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141

3-24 Rate Generator Division . . . . . . . . . . . . . . . . . . . . . . . . . . . .142

3-25 Serial Communications Control Register One. . . . . . . . . . . .144

3-26 Serial Communications Control Register Two. . . . . . . . . . . .144

3-27 Serial Communications Status Register . . . . . . . . . . . . . . . .145

3-28 Serial Communications Data Register. . . . . . . . . . . . . . . . . .146

3-29 Double Buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .146

3-30 Data Formats. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .147

3-31 SCI Normal Transmit Operation Flowchart . . . . . . . . . . . . . .149

3-32 SCI Normal Receive Operation Flowchart. . . . . . . . . . . . . . .149

3-33 SCI Application Example Program . . . . . . . . . . . . . . . . . . . .152

3-34 SPI Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .154

3-35 Shift Register Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . .155

3-36 Data/Clock Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . .157

3-37 Serial Peripheral Control Register. . . . . . . . . . . . . . . . . . . . .158

3-38 Serial Peripheral Status Register. . . . . . . . . . . . . . . . . . . . . .160

3-39 Serial Peripheral Data I/O Register . . . . . . . . . . . . . . . . . . . .161

3-40 SPI Application Example Diagram. . . . . . . . . . . . . . . . . . . . .162

3-41 SPI Application Example Flowchart. . . . . . . . . . . . . . . . . . . .164

3-42 SPI Application Example Program. . . . . . . . . . . . . . . . . . . . .165

3-43 Programmable Timer Block Diagram. . . . . . . . . . . . . . . . . . .167

3-44 16-Bit Counter Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .168

3-45 Input-Capture Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . .171

3-46 Output-Compare Operation. . . . . . . . . . . . . . . . . . . . . . . . . .172

3-47 Timer Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175

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List of Figures

M68HC05 Applications Guide — Rev. 4.0

MOTOROLA List of Figures 17

Figure Title Page

3-48 Timer Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .176

3-49 Timer Application Example Program. . . . . . . . . . . . . . . . . . .178

3-50 STOP/WAIT Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . .179

3-51 Program Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183

3-52 Option Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .184

4-1 Thermostat Project Schematic Diagram . . . . . . . . . . . . . . . .198

4-2 Precision Temperature Sensing Circuit. . . . . . . . . . . . . . . . .199

4-3 Port A Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200

4-4 Port B Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .201

4-5 Port C Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .201

4-6 Port D Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202

4-7 Display Checkout Flowchart . . . . . . . . . . . . . . . . . . . . . . . . .204

4-8 Display Checkout Program Listing. . . . . . . . . . . . . . . . . . . . .205

4-9 Keypad Checkout Flowchart . . . . . . . . . . . . . . . . . . . . . . . . .208

4-10 Keypad Checkout Program Listing . . . . . . . . . . . . . . . . . . . .209

4-11 Main Program Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . .211

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List of Figures

M68HC05 Applications Guide — Rev. 4.0

18 List of Figures MOTOROLA

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M68HC05 Applications Guide — Rev. 4.0

MOTOROLA List of Tables 19

Applications Guide — M68HC05

List of Tables

Table Title Page

2-1 Decimal, Binary, and Hexadecimal Equivalents. . . . . . . . . . . .33

3-1 COP Timeout Period versus CM1 and CM0. . . . . . . . . . . . . . .98

3-2 Register/Memory Instructions. . . . . . . . . . . . . . . . . . . . . . . . .116

3-3 Read/Modify-Write Instructions. . . . . . . . . . . . . . . . . . . . . . . .117

3-4 Branch Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118

3-5 Control Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119

3-6 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . .121

3-7 Opcode Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127

3-8 Vector Address for Interrupts and Reset . . . . . . . . . . . . . . . .129

3-9 I/O Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135

3-10 Prescaler Baud Rate Frequency Output. . . . . . . . . . . . . . . . .142

3-11 Transmit Baud Rate Output . . . . . . . . . . . . . . . . . . . . . . . . . .143

3-12 ASCII-Hexadecimal Code Conversion . . . . . . . . . . . . . . . . . .151

4-1 Thermostat Project Parts List . . . . . . . . . . . . . . . . . . . . . . . . .199

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List of Tables

M68HC05 Applications Guide — Rev. 4.0

20 List of Tables MOTOROLA

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NXP 68HC705X32 Reference guide

NXP 68HC705X32 Reference guide

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