LG Electronics 47LE730N-ZA User manual

Category
TVs & monitors
Type
User manual

This manual is also suitable for

LED LCD TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : LD03E
MODEL : 47LE7300 47LE7300-ZA
MODEL : 47LE730N 47LE730N-ZA
MODEL : 47LE7380
47LE7380-ZA
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in KoreaP/NO : MFL63263214 (1008-REV00)
- 2 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 7
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SVC. SHEET ...............................................................................................
- 3 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
1.5 Kohm/10W
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard
IMPORTANT SAFETY NOTICE
0.15 uF
- 4 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
4. Module General Specification
1. Application range
This specification is applied to the LCD TV used LD03E
chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC :CE, IEC
No. Item Specification Remark
1 Display Screen Device 119 cm(47 inch) wide color display module LCD
2 Aspect Ratio 16:9
3 LCD Module 119 cm(47 inch) TFT LCD FHD LGD/ IOP
4 Operating Environment Temp. : 0 deg ~ 50 deg
Humidity : 20 % ~ 90 %
5 Storage Environment Temp. : -20 deg ~ 60 deg
Humidity : 10 ~ 90 %
6 Input Voltage AC 100-240V~, 50 / 60Hz
7 Power Consumption Power on (White)
LGD Typ : 103 LCD (Module) + Backlight(EDGE LED)
8 Module Size 1083.6(H) x 628.8(V) x 25.5 mm(D) With inverter
8 Pixel Pitch 0.5415 (H) x 0.5415 (V)
9 Back Light LED(EDGE), LGE(IOP)
10 Display Colors 1.06 B(true) colors
11 Coating 3H
- 5 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Module optical specification
1) Stable for approximately 60 minutes in a dark environment at 25 ºC ± 2 ºC and windless room.
2) Operating Ambient Humidity: Min 10, Max 90 %RH
3) Suppl Voltage: 24 V
4) Frame Frequency: 120 Hz
No. Item Specification Min. Typ. Max. Remark
1. Viewing Angle<CR>10> Right/Left/Up/Down 89/89/89/89 CR > 10
2. Luminance Luminance (cd/m
2
) 360 450
Variation 1.3 MAX /MIN
3. Contrast Ratio CR 1000 1400
4. CIE Color Coordinates White Wx 0.279
Wy 0.292
RED Xr 0.636
Yr Typ. 0.335 Typ.
Green Xg -0.03 0.291 +0.03
Yg 0.603
Blue Xb 0.146
Yb 0.061
6. Component Video Input (Y, C
B
/PB, CR/PR)
No.
Specification
Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
- 6 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
No.
Specification
Proposed Remarks
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA
7. 1280*1024 63.595 60.0 108.875 SXGA FHD model
8. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
7. RGB (PC)
8. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
8. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
- 7 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with
LD03E chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ºC ± 5 ºC of temperature and 65 % ±10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~ 50 / 60Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.
In case of keeping module is in the circumstance of 0 °C, it
should be placed in the circumstance of above 15 °C for 2
hours
In case of keeping module is in the circumstance of below -
20 °C, it should be placed in the circumstance of above 15
°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.
3. Automatic Adjustment
3.1. ADC Adjustment
(1) Overview
ADC adjustment is needed to find the optimum black level
and gain in Analog-to-Digital device and to compensate
RGB deviation.
(2) Equipment & Condition
1) Jig (RS-232C protocol)
2) MSPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)
- Resolution : 480i Comp1
1080P Comp1
1920*1080 RGB
- Pattern : Horizontal 100 % Color Bar Pattern
- Pattern level : 0.7 ± 0.1 Vp-p
- Image
(3) Adjustment
1) Adjustment method
- Using RS-232, adjust items listed in 3.1 in the other
shown in “3.1.(3).3)”
2) Adj. protocol
Ref.) ADC Adj. RS232C Protocol_Ver1.0
3) Adj. order
- aa 00 00 [Enter ADC adj. mode]
- xb 00 40 [Change input source to Component1(480i)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 60 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- ad 00 90 End adj.
3.2. MAC Address
(1) Equipment & Condition
- Play file: Serial.exe
- MAC Address edit
- Input Start / End MAC address
(2) Download method
1) Communication Prot connection
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
Protocol Command Set ACK
Enter adj. mode aa 00 00 a 00 OK00x
Source change xb 00 40 b 00 OK40x (Adjust 480i Comp1 )
xb 00 60 b 00 OK60x (Adjust 1024*768 RGB)
Begin adj. ad 00 10
Return adj. result OKx (Case of Success)
NGx (Case of Fail)
Read adj. data (main) (main)
ad 00 20 000000000000000000000000007c007b006dx
(sub) (Sub)
ad 00 21 000000070000000000000000007c00830077x
Confirm adj. ad 00 99 NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj. aa 00 90 a 00 OK90x
PCBA
PC(RS-232C)
RS-232C Port
- 8 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2) MAC Address Download
- Com 1,2,3,4 and 115200(Baud rate)
- Port connection button click(1)
- Load button click(2) for MAC Address write.
- Start MAC Address write button(3)
- Check the OK Or NG
3.3. LAN
(1) Equipment & Condition
A Each other connection to LAN Port of IP Hub and Jig
(2) LAN inspection solution
A LAN Port connection with PCB
A Network setting at MENU Mode of TV
A setting automatic IP
A Setting state confirmation
-> If automatic setting is finished, you confirm IP and
MAC Address.
3.4. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
(1) Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) Connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
3.5. V-COM Adjust(Only LGD(M+S) Module)
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
Row Line
Column Line
CLC
CST
Pane l
S
Y
S
T
E
M
Gat e Driv e IC
So urce D r i v e I C
Circuit Block
Ti m i n g
Co nt r oll e r
Po w e r
Blo ck
V
COM
Ga mma
Re f e r ence V oltage
Gamm a R eference
Volta ge
Data (R ,G ,B ) & C on t ro l signal
Control si gnal
Data (R ,G,B ) &
Control si gnal
In t er f a ce
TFT
Po w e r I n pu t
Power Input
Da t a I n p u t
Da t a I n p u t
V
COM
Liquid
Crystal
V
COM
SET PC
- 9 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- Adjust sequence
A Press the PIP key of the ADJ remote controller. (This PIP
key is hot key to enter the VCOM adjusting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. V-
Com”)
A As pushing the right or the left button on the remote
controller, And find the V-COM value Which is no or
minimized the Flicker.
(If there is no flicker at default value, Press the exit key
and finish the VCOM adjustment.)
A Push the OK key to store value. Then the message
“Saving OK” is pop.
A Press the exit key to finish VCOM adjustment.
3.6. Model name & serial number download
(1) Model name & Serial number D/L
A Press “Power on” key of service remocon.(Baud rate :
115200 bps)
A Connect RS232 Signal Cable to RS-232 Jack.
A Write Serial number by use RS-232.
A Must check the serial number at Instart menu.
(2) Method & notice
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C.Serial number D/L must be conformed when it is
produced in production line, because serial number D/L
is mandatory by D-book 4.0
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man,
sometimes model name or serial number is initialized.(Not
always)
There is impossible to download by bar code scan, so It
need Manual download.
a. Press the ‘instart’ key of ADJ remote control.
b. Go to the menu ‘5.Model Number D/L’ like below photo.
c. Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
d. Check the model name Instart menu -> Factory name
displayed (ex 42LE7500-ZA)
e. Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LE7500-ZA)
3.7. CI+ Key Download method
(1) Download Procedure
1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
2) Connect RS232-C Signal Cable.
3) Write CI+ Key through RS-232-C.
4) Check whether the key was downloaded or not at ‘In
Start’ menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
1. check the method of CI+ Key value
a. check the method on Instart menu
b. check the method of RS232C Command
1) into the main ass’y mode (RS232 : aa 00 00)
2) check the key download for transmitted command
(RS232 : ci 00 10)
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
2. Check the method of CI+ Key value (RS232)
1) into the main ass’y mode (RS232 : aa 00 00)
2) Check the method of CI+ key by command (RS232 :
ci 00 20)
3) Result value
i 01 OK 1d1852d21c1ed5dcx
[Visual Adjust and control the Voltage level]
CMD 1 CMD 2 Data 0
AA00
CMD 1 CMD 2 Data 0
CI10
CMD 1 CMD 2 Data 0
AA00
CMD 1 CMD 2 Data 0
CI20
CI+ key Value
- 10 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4. Manual Adjustment
4.1. ADC(GP2) Adjustment
4.1.1. Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
4.1.2. Equipment & Condition
(1) Adjust Remocon
(2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern
Generator
- Resolution :
480i, 720*480 (MSPG-925FA -> Model: 209, Pattern: 65)
- 480i
1080p, 1920*1080 (MSPG-925FA -> Model: 225, Pattern:
65) - 1080p
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7 ± 0.1 Vp-p
- Image
(3) Must use standard cable
4.1.3. Adjust method
(1) ADC 480i, 1080p Comp1
1) Check connected condition of Comp1 cable to the equipment
2) Give a 480i, 1080p Mode, Horizontal 100% Color Bar
Pattern to Comp1.
(MSPG-925FA -> Model: 209, Pattern: 65) - 480i
(MSPG-925FA -> Model: 225, Pattern: 65) - 1080p
3) Change input mode as Component1 and picture mode
as “Standard”
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
(2) ADC 1920*1080 RGB
1) Check connected condition of Component & RGB cable
to the equipment
2) Give a 1920*1080 Mode, 100 % Horizontal Color Bar
Pattern to RGB port.
(MSPG-925 Series -> model:126 , pattern:65 )
3) Change input mode as RGB and picture mode as “Standard”.
4) Press the In-start Key on the ADJ remote after at least 1
min of signal reception. Then, select 7. External ADC ->
1. COMP 1080p on the menu. Press enter key. The
adjustment will start automatically.
5) If ADC calibration is successful, “ADC RGB Success” is
displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
6) If ADC calibration is failure, after recheck ADC pattern or
condition retry calibration Error message refer to 5).
4.2. EDID(The Extended Display Identification
Data)/DDC(Display Data Channel) download
(1) Overview
It is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any
necessity of user input. It is a realization of “Plug and Play”.
(2) Equipment
- Adjust remote control
- Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
(3)Download method
1) Press Adj. key on the Adj. R/C, then select “10.EDID
D/L”, By pressing Enter key, enter EDID D/L menu.
2) Select [Start] button by pressing Enter key, HDMI1 /
HDMI2 / HDMI3 / HDMI4 / RGB are Writing and display
OK or NG.
(4) EDID DATA
A HDMI
A RGB
A Reference
- HDMI1 ~ HDMI4 / RGB
- In the data of EDID, bellows may be different by S/W or
Input mode.
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
For HDMI EDIDFor Analog EDID
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 00 FF FF FF FF FF FF 00 1E 6D
0x01 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26
0x02 0F 50 54 A1 08 00 71 4F 81 80 01 01 01 01 01 01
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20
0x07 01
0x00 02 03 26 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
0x01 22 15 01 26 15 07 50 09 57 07 67
0x02 E3 05 03 01 01 1D 80 18 71 1C 16 20 58 2C
0x03 25 00 A0 5A 00 00 00 9E 01 1D 00 80 51 D0 0C 20
0x04 40 80 35 00 A0 5A 00 00 00 1E 02 3A 80 18 71 38
0x05 2D 40 58 2C 45 00 A0 5A 00 00 00 1E 66 21 50 B0
0x06 51 00 1B 30 40 70 36 00 A0 5A 00 00 00 1E 00 00
0x07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 00 FF FF FF FF FF FF 00 1E 6D
0x01 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26
0x02 0F 50 54 A1 08 00 81 80 61 40 45 40 31 40 01 01
0x03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
0x04 45 00 A0 5A 00 00 00 1E 01 1D 00 72 51 D0 1E 20
0x05 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
0x06 3E 1E 53 10 00 0A 20 20 20 20 20 20
0x07 00
- 11 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Product ID
Serial No. : Controlled on product line
Month, Year: Controlled on production line:
ex) Monthly : ‘01’ -> ‘01’
Year : ‘2010’ -> ‘14’
Model Name(Hex):
Checksum: Changeable by total EDID data.
Vendor Specific(HDMI)
4.3. White Balance Adjustment
4.3.1 Overview
(1) W/B adj. Objective & How-it-works
(2) Objective: To reduce each Panel’s W/B deviation
(3) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(4) Adj. condition : normal temperature
1) Surrounding Temperature : 25 ºC ± 5 ºC
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
4.3.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14)
2) Adj. Computer(During auto adj., RS-232C protocol is
needed)
3) Adjust Remocon
4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model:217, Pattern:78)
-> Only when internal pattern is not available
A Color Analyzer Matrix should be calibrated using CS-1000
4.3.3. Equipment connection MAP
4.3.4. Adj. Command (Protocol)
<Command Format>
- LEN: Number of Data Byte to be sent
- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
A RS-232C Command used during auto-adj.
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f -> Gain adj. completed
*(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj.
wb 00 ff -> End white balance auto-adj.
A Adj. Map
Model Name HEX EDID Table DDC Function
FHD Model 0001 01 00 Analog
FHD Model 0001 01 00 Digital
MODEL MODEL NAME(HEX)
all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
Color Analyzer
Computer
Pattern Generator
RS-232C
RS-232C
RS-232C
Probe
Signal Source
* If TV internal pattern is used, not needed
LEN CMD VAL
CS
RS-232C COMMAND Explanation
[CMD ID DATA]
wb 00 00 Begin White Balance adj.
wb 00 10 Gain adj.(internal white pattern)
wb 00 1f Gain adj. completed
wb 00 20 Offset adj.(internal white pattern)
wb 00 2f Offset adj. completed
wb 00 ff End White Balance adj.(Internal pattern disappears)
ITEM Command Data Range Default
(Hex.) (Decimal)
Cmd 1 Cmd 2 Min Max
Cool R-Gain j g 00 C0
G-Gain j h 00 C0
B-Gain j i 00 C0
R-Cut
G-Cut
B-Cut
Medium R-Gain j a 00 C0
G-Gain j b 00 C0
B-Gain j c 00 C0
R-Cut
G-Cut
B-Cut
Warm R-Gain j d 00 C0
G-Gain j e 00 C0
B-Gain j f 00 C0
R-Cut
G-Cut
INPUT MODEL NAME(HEX)
HDMI1 67 03 0C 00 10 00 B8 2D
HDMI2 67 03 0C 00 20 00 B8 2D
HDMI3 67 03 0C 00 30 00 B8 2D
HDMI4 67 03 0C 00 40 00 B8 2D
HDMI5 67 03 0C 00 50 00 B8 2D
- 12 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.3.5. Adj. method
(1) Auto adj. method
1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable (RS-232C)
4) Select mode in adj. Program and begin adjustment.
5) When adj. is complete (OK Sing), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
A W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need.
(2) Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10cm of the surface.
3) Press ADJ key -> EZ adjust using adj. R/C -> 7. White-
Balance then press the cursor to the right (KEY G).
(When KEY(G) is pressed 216 Gray internal pattern will
be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature.
A If internal pattern is not available, use RF input. In EZ
Adj. menu 7.White Balance, you can select one of 2
Test-pattern: ON, OFF. Default is inner(ON). By
selecting OFF, you can adjust using RF signal in 216
Gray pattern.
A Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer (CA-210) probe should be within
10cm and perpendicular of the module surface (80°~
100°)
3) Aging time
- After Aging Start, Keep the Power ON status during
5 Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.
4.3.6. Reference (White Balance Adj. coordinate
and temperature)
A Luminance : 216 Gray
A Standard color coordinate and temperature using CS-1000
(over 26 inch)
A Standard color coordinate and temperature using CA-
210(CH 9)
4.4. EYE-Q function check
Step 1) Turn on TV
Step 2) Press EYE key of Adj. R/C
Step 3) Cover the Eye Q II sensor on the front of the using
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,
replace Eye Q II sensor.
4.5. Local Dimming Function Check
Step 1) Turn on TV.
Step 2) Press Tilt key of Adj. R/C.
Step 3) Confirm under the screen.
Mode Color Coordination Temp ∆UV
xy
COOL 0.269 0.273 13000 K 0.0000
MEDIUM 0.285 0.293 9300 K 0.0000
WARM 0.313 0.329 6500 K 0.0000
Mode Color Coordination Temp ∆UV
xy
COOL 0.269 ± 0.002 0.273 ± 0.002 13000 K 0.0000
MEDIUM 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000
WARM 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000
- 13 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.6. Option selection per country
(1) Overview
- Option selection is only done for models in Non-EU
- Applied model: LD03D/03E Chassis applied EU model
(2) Method
1) Press ADJ key on the Adj. R/C, then select Country
Group Menu
2) Depending on destination, select Country Group Code
04 or Country Group EU then on the lower Country
option, select US, CA, MX. Selection is done using +, -
or
GF KEY.
4.7. Tool Option selection
- Method : Press Adj. key on the Adj. R/C, then select Tool
option.
4.8. Ship-out mode check(In-stop)
After final inspection, press IN-STOP key of the Adj. R/C and
check that the unit goes to Stand-by mode.
After final inspection, Always turn on the Mechanical S/W.
5. GND and Internal Pressure check
5.1. Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.2. Checkpoint
• TEST voltage
- GND: 1.5 KV/min at 100 mA
- SIGNAL: 3 KV/min at 100 mA
• TEST time: 1 second
• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
• LEAKAGE CURRENT: At 0.5 mArms
6. Audio
Measurement condition:
1. RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
2. CVBS, Component: 1 KHz sine wave signal 0.4 Vrms
3. RGB PC: 1 KHz sine wave signal 0.7 Vrms
7. USB S/W Download (option, Service only)
1) Put the USB Stick to the USB socket
2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”
4) Updating is starting.
5) Updating Completed, The TV will restart automatically
6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1. Push "IN-START" key in service remote control.
2. Select "Tool Option 1" and Push “OK” button.
3. Punch in the number. (Each model has their number.)
MODEL Tool 1 Tool 2 Tool 3 Tool 4 Tool 5
47LE7300 33056 31795 64556 22958 2066
No. Item Min. Typ. Max. Unit
1. Audio practical max 9.0 10.0 12.0 W EQ Off
Output, L/R AVL Off
(Distortion=10% 8.5 8.9 9.8 Vrms Clear Voice Off
max Output)
2. Speaker (8Ω 10.0 15.0 W EQ On
Impedance) AVL On
Clear Voice On
- 14 -
LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
- 15 -
LGE Internal Use OnlyCopyright LG Electronics. Inc. All rights reserved.
Only for training and service purposes
300
500
501
510
120
122
200
801
LV1
LV2
540
521
530
802
810
910
710
A7
900
400
A2
A21
A10
A9
A5
* Stand Base
+ Stand Body
* Stand + Set
803
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.06.18
BCM3556 & NAND FLASH
BCM (EUROBBTV)
NAND_DATA[7]
CI_A[0]
CI_A[3]
CI_A[2]
NAND_DATA[6]
NAND_DATA[6]
NAND_DATA[2]
CI_A[12]
NAND_DATA[0]
NAND_DATA[4]
NAND_DATA[3]
NAND_DATA[3]
NAND_DATA[1]
NAND_DATA[2]
CI_A[8]
CI_A[5]
NAND_DATA[7]
CI_A[6]
NAND_DATA[5]
NAND_DATA[7]
NAND_DATA[0]
NAND_DATA[5]
NAND_DATA[1]
NAND_DATA[0]
CI_A[9]
CI_A[11]
NAND_DATA[6]
CI_A[13]
CI_A[7]
NAND_DATA[5]
CI_A[4]
NAND_DATA[2]
NAND_DATA[4]
NAND_DATA[4]
CI_A[10]
NAND_DATA[0-7]
CI_A[1]
NAND_DATA[1]
NAND_DATA[3]
R132
22
R127
22
R117
33
R1037
2.7K
OPT
R1003
2.7K
NAND_WEb
PWM_DIM
DSUB_DET
NAND_DATA[0-7]
R1007
2.7K
OPT
R102
22
SC_RE2
NAND_CEb
R1012 100
MODEL_OPT_5
R1022 1K
DDR_512MB
MODEL_OPT_1
C115
0.1uF
R169
2.7K
C114
0.1uF
NAND_REb
R133
22
SCL3_3.3V
R1023 1K
NON_GIP
R1001
2.7K
MODEL_OPT_0
R193 4.7K
FRC_RESET
R1042
100
NAND_ALE
CI_OUTCLK
MODEL_OPT_1
C116
4700pF
SDA1_3.3V
MODEL_OPT_2
R140
22
A_DIM
R194 4.7K
R1008
2.7K
OPT
RGB_DDC_SCL
R1040
2.7K
OPT
NAND_ALE
R1039
2.7K
EBI_WE
/CI_IREQ
C103
0.1uF
CI_MOD_RESET
RF_SWITCH_CTL
MODEL_OPT_0
R109 100
NAND_CLE
+3.3V_NORMAL
C167
8pF
OPT
R1000
2.7K
MODEL_OPT_5
NAND_CEb
TUNER_RESET
R122
22
ERROR_OUT
R1024 100
NAND_CLE
NAND_REb
R130
22
NAND_WEb
+3.3V_NORMAL
R1002
2.7K
OPT
AV_CVBS_DET
+3.3V_NORMAL
R1033
22
R157
2.7K
OPT
CI_A[0-13]
SIDE_AV_DET
IF_AGC_SEL
EPHY_LINK
MODEL_OPT_4
R1045
4.7K
NAND_RBb
R1006
2.7K
OPT
R136
4.7K
R1018 1K
NO_FRC
R1005
2.7K
R1011 1K
MINI_LVDS/NO LOCAL_D
FE_TS_VAL_ERR
+3.3V_NORMAL
SDA3_3.3V
R1019 100
/CI_CD2
R1013 1K
EXTERNEL FRC/T_CON FRC
+3.3V_NORMAL
R1015 1K
DDR_256MB
BT_RESET
R156
2.7K
+3.3V_NORMAL
NAND_DATA[0-7]
R108
100
R158
2.7K
OPT
NAND_CLE
R1021 1K
HD
R110 100
SC_RE1
MODEL_OPT_2
R111
22
R1034
2.7K
+3.3V_NORMAL
R1004
2.7K
OPT
SCL1_3.3V
C171
8pF
OPT
IC102
M24M01-HRMN6TP
3
E2
2
E1
4
VSS
1
NC
5
SDA
6
SCL
7
WP
8
VCC
MODEL_OPT_3
CI_5V_CTL
R134 2.7K
R191 2.7K
SCL0_3.3V
R1020 1K
FRC
+3.3V_NORMAL
EBI_CS
R1009 1K
GIP
RGB_DDC_SDA
+3.3V_NORMAL
EBI_CS
R1046
22
/CI_WAIT
NAND_DATA[0-7]
EBI_RW
R1035
2.7K
R1044
0
BCM_RX
EPHY_ACTIVITY
Q101
KRC103S
E
B
C
R1017 1K
FHD
R1038
2.7K
R129
22
MODEL_OPT_4
R1014 1K
LVDS/LOCAL_D
HP_DET
NAND_ALE
SDA0_3.3V
BCM_TX
FLASH_WP
LNA2_CTL/BOSTER_CTL
R1036
2.7K
OPT
+3.3V_NORMAL
MODEL_OPT_3
R1010 1K
NO FRC/INTERNER FRC
R107
100
/CI_CD1
R116
22
NAND_RBb
R1027
10K
SYS_RESETb
+3.3V_NORMAL
SOC_RESET
WIRELESS_DL_TX
WIRELESS_DL_RX
COMP2_DET
SDA2_3.3V
SCL2_3.3V
AUD_MASTER_CLK
SCART1_DET
VREG_CTRL
/RST_HUB
R1030 0
R1032
0
R1025
4.7K
C136 10uF
10V
SDA3_3.3V
SCL3_3.3V
R1026 22
R1028 22
DTV_ATV_SELECT
SIDE_COMP_DET
POWER_DET
R1047
0
OPT
HDMI_HPD_4
HDMI_HPD_3
HDMI_HPD_2
HDMI_HPD_1
R1141K
R1029
1K
R199
1K
R106
1K
5V_HDMI_1
5V_HDMI_2
5V_HDMI_3
5V_HDMI_4
R1048
100
R1050
100
R161 100
R1049
22
R1051
22
LOCAL DIMMING
R170
1.2K
R187
1.2K
R180
1.2K
R183
1.2K
R176
1.2K
R184
1.2K
R171
1.2K
R177
1.2K
R123 0
WIRELESS
R124
0
WIRELESS
IC101
NAND04GW3B2DN6E
NAND FLASH
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VDD_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
SIDE_COMP_DET
Q103
FDV301N
OPT
G
D
S
Q104
FDV301N
OPT
G
D
S
R173
10K
OPT
WIRELESS_SCL
SDA2_3.3V
WIRELESS_SDA
SCL2_3.3V
+3.3V_NORMAL
R160100
LG5111_RESET
R1920
DC DC
DEMOD_RESET
DEMOD_RESET
DD
DD
M_REMOTE_RX
M_REMOTE_RX
M_REMOTE_TX
M_REMOTE_TX
R103 0
RF_SWITCH_CTL_CHB RF_SWITCH_CTL_CHB
R113
22
DEMOD_RESET
LG5111_RESET
+12V
C178
0.1uF
50V
C179
0.1uF
50V
R104112K
C173
22uF
16V
C180
100pF
50V
EMI
R105 56
R115 1.8K
R1052
4.7K
+3.3V_NORMAL
MODEL_OPT_6
/CI_SEL
MODEL_OPT_6
R118 1K
OLED
R119 1K
NON_OLED
MDS62110204
GAS6-*1
5.5T_GAS
MDS62110204
GAS7-*1
5.5T_GAS
MDS62110204
GAS1-*1
5.5T_GAS
MDS62110206
GAS6
6.5T_GAS
MDS62110206
GAS2
OPT
MDS62110206
GAS7
6.5T_GAS
MDS62110206
GAS5
OPT
MDS62110206
GAS1
6.5T_GAS
MDS62110206
GAS4
OPT
MDS62110206
GAS3
OPT
MDS62110206
GAS8
OPT
MDS62110206
GAS9
OPT
IC100
LGE3556C (C0 VERSION)
GPIO_00
N26
GPIO_01
L26
GPIO_02
N25
GPIO_03
L25
GPIO_04
K27
GPIO_05
K28
GPIO_06
K24
GPIO_07
K26
GPIO_08
K25
GPIO_09
AA27
GPIO_10
AA28
GPIO_11
AA26
GPIO_12
L1
GPIO_13
L3
GPIO_14
L2
GPIO_15
Y25
GPIO_16
Y26
GPIO_17
M27
GPIO_18
AA25
GPIO_19
R25
GPIO_20
N28
GPIO_21
N27
GPIO_22
AH18
GPIO_23
P23
GPIO_24
M23
GPIO_25
AD19
GPIO_26
AE19
GPIO_27
M4
GPIO_28
M5
GPIO_29
L23
GPIO_30
Y28
GPIO_31
Y27
GPIO_32
G2
GPIO_33
G3
GPIO_34
G5
GPIO_35
G6
GPIO_36
G4
GPIO_37
L24
GPIO_38
P25
GPIO_39
L5
GPIO_40
K4
GPIO_41
K1
GPIO_42
L27
GPIO_43
M26
GPIO_44
N23
GPIO_45
R28
GPIO_46
R27
GPIO_47
R26
GPIO_48
P28
GPIO_49
P27
GPIO_50
K6
GPIO_51
K5
GPIO_52
P26
GPIO_53
M3
GPIO_54
M2
GPIO_55
M1
GPIO_56
L4
GPIO_57
L6
SGPIO_00
W27
SGPIO_01
W28
SGPIO_02
W26
SGPIO_03
W25
SGPIO_04
J2
SGPIO_05
J1
SGPIO_06
K3
SGPIO_07
K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
MDS62110205
GAS6-*2
7.5T_GAS
MDS62110205
GAS1-*2
7.5T_GAS
MDS62110205
GAS7-*2
7.5T_GAS
BT_ON/OFF
R181 100
BCM BT MODULE
MDS61887710
GAS1-*3
9.5T_GAS
MDS61887710
GAS2-*3
9.5T_GAS
MDS61887710
GAS3-*3
9.5T_GAS
MDS61887710
GAS4-*3
9.5T_GAS
MDS61887710
GAS5-*3
9.5T_GAS
MDS61887710
GAS6-*3
9.5T_GAS
MDS61887710
GAS8-*3
9.5T_GAS
MDS61887710
GAS9-*3
9.5T_GAS
MDS62110204
GAS1-*4
55LD650_5.5T
MDS62110204
GAS3-*4
55LD650_5.5T
1
Default Res. of all NAND pin is Pull-down
For CI
For CI
* I2C MAP
* NAND FLASH MEMORY 4Gbit (512M for BB)
MODEL OPTION
External Demod.
Open Drain
* I2C_0 :
* I2C_1 :
* I2C_2 :
* I2C_3 :
BB Add.
For CI
Boot Strap
RESET
A8’h
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (1, DNS)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA (Fundmental Recommand)
01 : 1.8mA
10 : 2.4mA (3rd over tune Recommand)
11 : 3.0mA
NAND_IO[7] : MIPS Frequency (DNS)
0 : 405MHz
1 : 378MHz
NAND_ALE : I2C Level (DNS)
0 : 3.3V Switching
1 : 5V Switching
NAND_CLE
0 : Enable D2CDIFF AC (DNS)
1 : Disabe D2CDIFF AC
NVRAM
EXT IRQ
GPIO_00, GPIO_01, GPIO_02,
GPIO_11, GPIO_11, GPIO_39
IR_INT : GPIO_23
IR1_IN : GPIO_25
IR2_IN : GPIO_29
IR_OUT : GPIO_26
PWM0 : GPIO_24
PWM1 : GPIO_09
IR_IN
INTERRUPT PIN
INTERRUPT PIN
INTERRUPT PIN
IR_IN
BCM_AVC_DEBUG_TX1
BCM_AVC_DEBUG_RX1
BT_MUTE
From wireless_I2C to micom I2C
SMD GASKET
15page:TW_9910_RESET
17page:M_RFMODULE_RESET
15page:CHB_RESET
17page : Motion Remocon
17page : Motion Remocon
28page : ISDB Demod
17page : Motion Remocon
17page : Motion Remocon
15page : CHB_SUB_TUNER
FOR ESD 12V Pattern
URSA3 External
HIGH
LOW
HIGH
OLED
LOW
DDR-256M
MODEL_OPT_4
HIGH
MAIN_MINI_LVDS
HD
MAIN_LVDS
K1
NON_OLED
MODEL_OPT_3
MODEL_OPT_6
MODEL_OPT_4
L25
N28
MODEL_OPT_5
FRC
MODEL_OPT_0
MODEL_OPT_2
DDR-512M
HIGH
GIP
PIN NAME
PWIZ Pannel T-con
with LG FRC
MODEL_OPT_1 AA26
HIGH
R26
URSA3 Internal
LOW
NON_URSA3
LOW
K4
*MODEL_OPT_0 & MODEL_OPT_4
REFER TO THIS OPTION
NON-GIP
PIN NO.
LOW
K27
NO FRC
NON_FRC
MODEL_OPT_0
FHD
URSA3
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM3556 AUD_IN/LVDS
2009.06.18
BCM (EUROBBTV)
CI_OUTDATA[6]
CI_OUTDATA[7]
CI_OUTVALID
CI_OUTSTART
CI_OUTDATA[1]
CI_OUTDATA[2]
CI_OUTDATA[0]
CI_OUTDATA[3]
CI_OUTDATA[4]
CI_OUTDATA[5]
54MHz_XTAL_N
54MHz_XTAL_P
L202
BLM18PG121SN1D
C213
0.01uF
A3.3V
A2.5V
C219
0.1uF
C214
0.1uF
R220 560
A1.2V
C215
0.1uF
C223
0.1uF
+3.3V_NORMAL
R201
1.5K
R200
1.5K
L200
BLM18PG121SN1D
A2.5V
C209 0.1uF
R209
3.9K
C201
100pF
R210
120
A1.2V
C207 0.1uF
C203 0.1uF
C202 0.1uF
A3.3V
R218
240
R219
1K
C222
0.1uF
A2.5V
C295
0.1uF
A2.5V
A1.2V
C236
0.1uF
C239
0.1uF
A1.2V
C2012
0.1uF
54MHz_XTAL_P
002:I2
C251
0.1uF
54MHz_XTAL_N
002:I1
A2.5V
A1.2V
L203
BLM18PG121SN1D
C233
0.1uF
+3.3V_NORMAL
A2.5V
+3.3V_NORMAL
C234
0.1uF
SYS_RESETb
001:A6;001:B7
L204
BLM18PG121SN1D
A1.2V
A1.2V
L207
BLM18PG121SN1D
C237
0.1uF
R2221K
R2621K
R221
4.7K
L211
BLM18PG121SN1D
LVDS_TX_0_DATA3_P
013:F7;035:AK14
LVDS_TX_0_DATA0_P
013:E7;035:AK11
LVDS_TX_1_DATA3_N
013:E7;035:AK19
LVDS_TX_1_DATA1_P
013:E7;035:AK16
LVDS_TX_0_DATA1_N
013:E7;035:AK12
LVDS_TX_0_DATA1_P
013:E7;035:AK11
LVDS_TX_1_CLK_P
013:E7;035:AK18
LVDS_TX_0_DATA2_N
013:F7;035:AK12
LVDS_TX_1_CLK_N
013:E7;035:AK18
LVDS_TX_0_DATA4_P
013:F7;035:AK14
LVDS_TX_1_DATA4_P
013:E7;035:AK19
LVDS_TX_0_DATA2_P
013:F7;035:AK12
LVDS_TX_1_DATA3_P
013:E7;035:AK19
LVDS_TX_0_CLK_N
013:E7;035:AK13
LVDS_TX_0_DATA4_N
013:F7;035:AK15
LVDS_TX_0_CLK_P
013:E7;035:AK13
LVDS_TX_1_DATA4_N
013:E7;035:AK20
LVDS_TX_1_DATA1_N
013:E7;035:AK17
LVDS_TX_0_DATA3_N
013:F7;035:AK14
LVDS_TX_1_DATA0_N
013:E7;035:AK16
LVDS_TX_1_DATA0_P
013:E7;035:AK16
LVDS_TX_1_DATA2_P
013:E7;035:AK17
LVDS_TX_1_DATA2_N
013:E7;035:AK17
LVDS_TX_0_DATA0_N
013:E7;035:AK11
SC1_LR_INCM
002:J7
REAR_AV_LR_INCM
002:J6
R233 51
R231 51
R230 51
R234 51
R229 51
R232 51
COMP2_LR_INCM
002:J6
SC1_L_IN
041:B5
R228 51
PC_LR_INCM
002:J7
PC_R_IN
009:I3
SC1_R_IN
041:B5
PC_L_IN
009:I3
R215 51
C238
0.1uF
D3.3V
R235
2.7K
P200
TJC2508-4A
1
2
3
4
A1.2V
R240
390
OPT
R243
604
L208
1008LS-272XJLC
C257
33pF
R212
22
R211
22
C229
12pF
C230
12pF
X903
54MHz
21
3
R245
34
R251
34
COMP2_VID_INCM
TU_CVBS_INCM
003:A3
R257
5.1
R256
5.1
B_VID_INCM
003:A5
R258
5.1
R259
5.1
R252
5.1
C2016 0.1uF
C2015 0.1uF
C258 0.1uF
R250
34
C262 0.1uF
R_VID_INCM
003:A5
R248
34
R244
34
REAR_AV_LR_INCM
002:C6
C264 0.1uF
R246
34
R247
34
C261 0.1uF
SIDE_AV_LR_INCM
002:C6
C2019 0.1uF
COMP2_LR_INCM
002:C6
G_VID_INCM
003:A5
PC_LR_INCM
002:C6
REAR_AV_CVBS_INCM
003:A3
C2014
0.15uF
C2024
0.15uF
C265
0.15uF
C2022
0.15uF
C269
0.15uF
EPHY_TDN
EPHY_TDP
A2.5V A1.2V
EPHY_RDP
C244
0.1uF
16V
L210
BLM18PG121SN1D
C247
0.1uF
C2020
0.1uF
EPHY_RDN
L209
BLM18PG121SN1D
L212
BLM18PG121SN1D
CI_OUTDATA[0-7],CI_OUTSTART,CI_OUTVALID
045:V14
CI_A[14]
SC1_CVBS_INCM
003:A3
C2011 0.1uF
R260
34
SIDE_AV_CVBS_INCM
003:A3
R261
34
C2023 0.1uF
FE_TS_DATA_CLK
FE_TS_SERIAL
FE_TS_SYNC
TU_SIF_INCM
003:A3
SC1_LR_INCM
002:C6
SC1_RGB_INCM
003:A4
R249
1K
R204 51
R214 51
BT_DP
BT_DM
SIDE_USB_DM
SIDE_USB_DP
COMP2_L_IN
COMP2_R_IN
DTV/MNT_V_OUT
REAR_AV_R_IN
041:B5
REAR_AV_L_IN
041:B5
SIDE_AV_LR_INCM
002:J6
SIDE_AV_L_IN
041:B5
SIDE_AV_R_IN
041:B5
C212
4.7uF
C2028
4.7uF
C208 4.7uF
C2026
4.7uF
C2021
4.7uF
C2018
4.7uF
C217
10uF
C228
10uF
OPT
C242
4.7uF
C2013
4.7uF
C235
4.7uF
C241
4.7uF
C240
4.7uF
C231
10uF
C270
0.47uF
C271
0.47uF
C2025
0.47uF
C2010
0.47uF
C2017
0.47uF
TP4021
TP4022
TP4023
R236
0
R237
0
R224
2.7K
OPT
R225
2.7K
OPT
R227
2.7K
R226
2.7K
C224 0.015uF
C226 0.015uF
C210 0.015uF
C206 0.015uF
C232 0.015uF
C220 0.015uF
C225 0.015uF
C221 0.015uF
C211 0.015uF
C227 0.015uF
C298 0.047uF
C279 0.047uF
C277
0.047uF
C253 0.047uF
C256 0.047uF
C254 0.047uF
C2027 0.047uF
C296 0.047uF
C299 0.047uF
C252 0.047uF
R264 0
R265
0
R266
2.7K
R238
75
1%
IC100
LGE3556C (C0 VERSION)
PKT0_CLK
D23
PKT0_DATA
C24
PKT0_SYNC
B26
RMX0_CLK
A25
RMX0_DATA
B25
RMX0_SYNC
A26
POD2CHIP_MCLKI
G23
POD2CHIP_MDI0
D25
POD2CHIP_MDI1
D24
POD2CHIP_MDI2
C25
POD2CHIP_MDI3
E27
POD2CHIP_MDI4
E26
POD2CHIP_MDI5
D28
POD2CHIP_MDI6
D27
POD2CHIP_MDI7
D26
POD2CHIP_MISTRT
E23
POD2CHIP_MIVAL
E24
CHIP2POD_MCLKO
F25
CHIP2POD_MDO0
C27
CHIP2POD_MDO1
C26
CHIP2POD_MDO2
B28
CHIP2POD_MDO3
B27
CHIP2POD_MDO4
A27
CHIP2POD_MDO5
F24
CHIP2POD_MDO6
F23
CHIP2POD_MDO7
E25
CHIP2POD_MOSTRT
C28
CHIP2POD_MOVAL
A28
VDAC_AVDD2P5
AC18
VDAC_AVDD1P2
AF20
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
AG21
VDAC_AVSS_1
AF19
VDAC_AVSS_2
AD20
VDAC_AVSS_3
AE20
VDAC_RBIAS
AH22
VDAC_1
AH20
VDAC_2
AG19
VDAC_VREG
AH21
BSC_S_SCL
M25
BSC_S_SDA
M24
USB_AVSS_1
R6
USB_AVSS_2
T6
USB_AVSS_3
R7
USB_AVSS_4
T7
USB_AVSS_5
T8
USB_AVDD1P2
R3
USB_AVDD1P2PLL
U3
USB_AVDD2P5
T4
USB_AVDD2P5REF
T3
USB_AVDD3P3
R4
USB_RREF
U4
USB_DM1
V1
USB_DP1
V2
USB_DM2
U1
USB_DP2
U2
USB_MONCDR
T5
USB_MONPLL
R5
USB_PWRFLT_1
R1
USB_PWRFLT_2
R2
USB_PWRON_1
T2
USB_PWRON_2
T1
EPHY_VREF
P6
EPHY_RDAC
P5
EPHY_RDN
P3
EPHY_RDP
P2
EPHY_TDN
N3
EPHY_TDP
N2
EPHY_AVDD1P2
P1
EPHY_AVDD2P5
P4
EPHY_PLL_VDD1P2
N4
EPHY_AGND_1
N1
EPHY_AGND_2
N5
EPHY_AGND_3
P7
AUDMX_LEFT1
AE6
AUDMX_RIGHT1
AD7
AUDMX_INCM1
AF6
AUDMX_LEFT2
AH4
AUDMX_RIGHT2
AG5
AUDMX_INCM2
AG4
AUDMX_LEFT3
AG6
AUDMX_RIGHT3
AF7
AUDMX_INCM3
AE7
AUDMX_LEFT4
AH5
AUDMX_RIGHT4
AG7
AUDMX_INCM4
AH6
AUDMX_LEFT5
AD8
AUDMX_RIGHT5
AF8
AUDMX_INCM5
AE8
AUDMX_LEFT6
AH7
AUDMX_RIGHT6
AH8
AUDMX_INCM6
AG8
AUDMX_AVSS_1
AF5
AUDMX_AVSS_2
AB9
AUDMX_AVSS_3
AA10
AUDMX_AVSS_4
AB10
AUDMX_AVSS_5
AA11
AUDMX_AVSS_6
AB11
AUDMX_LDO_CAP
AC8
AUDMX_AVDD2P5
AE5
LVDS_TX_0_DATA0_P
B4
LVDS_TX_0_DATA0_N
A4
LVDS_TX_0_DATA1_P
C6
LVDS_TX_0_DATA1_N
B6
LVDS_TX_0_DATA2_P
B3
LVDS_TX_0_DATA2_N
A3
LVDS_TX_0_DATA3_P
A1
LVDS_TX_0_DATA3_N
A2
LVDS_TX_0_DATA4_P
D5
LVDS_TX_0_DATA4_N
D6
LVDS_TX_0_CLK_P
C5
LVDS_TX_0_CLK_N
B5
LVDS_TX_1_DATA0_P
B1
LVDS_TX_1_DATA0_N
B2
LVDS_TX_1_DATA1_P
C2
LVDS_TX_1_DATA1_N
C3
LVDS_TX_1_DATA2_P
D1
LVDS_TX_1_DATA2_N
D2
LVDS_TX_1_DATA3_P
E1
LVDS_TX_1_DATA3_N
E2
LVDS_TX_1_DATA4_P
E3
LVDS_TX_1_DATA4_N
E4
LVDS_TX_1_CLK_P
D3
LVDS_TX_1_CLK_N
D4
LVDS_PLL_VREG
F5
LVDS_TX_AVDDC1P2
F1
LVDS_TX_AVDD2P5_1
F4
LVDS_TX_AVDD2P5_2
F2
LVDS_TX_AVSS_1
C1
LVDS_TX_AVSS_2
F3
LVDS_TX_AVSS_3
C4
LVDS_TX_AVSS_4
A5
LVDS_TX_AVSS_5
E5
LVDS_TX_AVSS_6
E6
LVDS_TX_AVSS_7
D7
LVDS_TX_AVSS_8
E7
LVDS_TX_AVSS_9
F7
LVDS_TX_AVSS_10
G7
LVDS_TX_AVSS_11
H7
CLK54_AVDD1P2
AD27
CLK54_AVDD2P5
AD28
CLK54_AVSS
AD26
CLK54_XTAL_N
AC26
CLK54_XTAL_P
AC27
CLK54_MONITOR
AE25
PM_OVERRIDE
Y23
VCXO_AGND_1
AA23
VCXO_AGND_2
AB24
VCXO_AGND_3
AC24
VCXO_AVDD1P2
AF25
VCXO_PLL_AUDIO_TESTOUT
AF24
RESET_OUTB
P24
RESETB
F6
NMIB
N24
TMODE_0
J5
TMODE_1
J4
TMODE_2
J6
TMODE_3
J3
SPI_S_MISO
V25
POR_OTP_VDD2P5
AH3
POR_VDD1P2
AB8
EJTAG_TCK
H4
EJTAG_TDI
H3
EJTAG_TDO
H2
EJTAG_TMS
H1
EJTAG_TRSTB
G1
EJTAG_CE0
H6
EJTAG_CE1
H5
PLL_MAIN_AVDD1P2
AB26
PLL_MAIN_AGND
AC25
PLL_MAIN_MIPS_EREF_TESTOUT
AB27
PLL_RAP_AVD_TESTOUT
M6
PLL_RAP_AVD_AVDD1P2
N6
PLL_RAP_AVD_AGND
N7
BYP_CPU_CLK
AA24
BYP_DS_CLK
Y24
BYP_SYS216_CLK
AE24
BYP_SYS175_CLK
AD25
2
Route INCM between associated
left and right signals of same channel
The INCM trace ends at the
same point where the connector
ground connects to the board ground
(thru-hole connector pin).
Place test points, resistors
near audio connector.
Connect the other side of
the resistor to GND as close
as possible to the ground
connection of the associated
audio connector.
54MHz X-TAL
R220 : BCM recommened resistor 562 ohm
BROAD BAND STUDIO
When usding FUNDMENTAl then series R = 0 ohm and CL = 8 pF
When usding Dip-type X-tal then series R = 22 ohm and CL = 12 pF
VIDEO INCM
PLACE NEAR BCM CHIP
AUDIO INCM
PLACE NEAR BCM CHIP
PLACE NEAR Jacks
Route Between SC2_L_IN & SC2_R_IN
Route Between AV1_L_IN & AV1_R_IN
Route Between COMP1_L_IN & COMP1_R_IN
Route Between SC1_L_IN & SC1_R_IN
Route Between PC_L_IN & PC_R_IN
Near J1501
Near J1600
Near J1603
Near J1500
Near J1602
Near Q1705
Near J1500
Near J1603
Near P1600
Near Q1704
Near J1501
Near J1500
Route Along With TUNER_SIF_IF_N
Run Along TUNER_CVBS_IF_P Trace
Run Along SC1_R,SC_G,SC_B Trace
Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace
Run Along DSUB_R Trace
Run Along DSUB_G Trace
Run Along DSUB_B Trace
Run Along SC1_CVBS_IN Trace
Run Along SC2_CVBS_IN Trace
TP is Necessory
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.06.18
BCM3556 VIDEO IN
EUROBBTV
B_VID_INCM
A2.5V
L105
BLM18PG121SN1D
A2.5V
A3.3V
R128
0
C125
0.1uF
C133
0.1uF
L103
BLM18PG121SN1D
A1.2V
L107
BLM18PG121SN1D
R137
10K
C105
OPT
L110
BLM18PG121SN1D
C156
0.1uF
A1.2V
DSUB_B
RGB_VSYNC
C130
0.1uF
A1.2V
R_VID_INCM
C112
0.1uF
SC1_RGB_INCM
C155
0.1uF
C154
0.1uF
L102
BLM18PG121SN1D
A2.5V
COMP2_VID_INCM
C110
0.1uF
A1.2V
G_VID_INCM
C134
0.1uF
C144
0.1uF
C131
0.1uF
D3.3V
A1.2V
L106
BLM18PG121SN1D
C160
0.1uF
C119
0.1uF
DSUB_G
R310 10K
C111
0.1uF
C104
OPT
C150
0.1uF
C157
0.1uF
C113
0.1uF
C124
0.1uF
C151
0.01uF
C117
1000pF
C161
0.1uF
C158
1000pF
C129
0.1uF
A2.5V
L108
BLM18PG121SN1D
C149
0.01uF
A1.2V
RGB_HSYNC
SPDIF_OUT
C153
0.1uF
C132
0.1uF
C135
0.1uF
C127
0.1uF
R153499
OPT
C152
0.01uF
R152499
C120
1000pF
C147
0.01uF
C123
0.01uF
C159
1000pF
C106
0.1uF
A2.5V
L109
BLM18PG121SN1D
C128
0.1uF
R139
12K
A2.5V
A3.3V
C148
0.01uF
L104
BLM18PG121SN1D
C118
0.01uF
DSUB_R
A2.5V
C121
0.1uF
+5V_NORMAL
R2037
10K
OPT
R2038 10K
10K
R2039
C3006
0.1uF
16V
HDMI_SCL
HDMI_SDA
R3070
R3080
R2036
1K
R309
10K
R3055
240
OPT
A2.5V
R4020
10K
R4021
12K
C4020
0.1uF
R3056
120
OPT
SC1_FB
SC1_ID
SC1_R
SC1_B
SC1_G
SIDE_AV_CVBS_INCM
SC1_CVBS_INCM
SC1_CVBS_IN
TU_CVBS_INCM
REAR_AV_CVBS_INCM
C100
0.1uF
SCART1_Rout_P
SCART1_Lout_N
SCART1_Rout_N
SCART1_Lout_P
TU_SIF_INCM
TU_SIF
TU_CVBS
HP_LOUT_N
HP_LOUT_P
HP_ROUT_P
HP_ROUT_N
D3.3V
C357
10uF
10V
C267
0.01uF
D1.2V
C320
0.1uF
16V
C319
0.1uF
16V
C284
0.01uF
C286
33uF
D1.8V
C356
0.1uF
16V
C318
0.1uF
16V
C276
0.1uF
C243
0.1uF
C293
0.01uF
C377
0.01uF
C304
0.1uF
16V
D1.2V
C363
0.1uF
16V
C378
0.1uF
C2006
0.01uF
C2003
0.1uF
D1.8V
C216
0.1uF
C275
0.1uF
C374
0.01uF
C294
0.1uF
C274
0.1uF
C255
1000pF
C382
0.01uF
C348
0.1uF
16V
C289
0.1uF
C370
0.1uF
C259
1000pF
C2004
33uF
C292
1000pF
C246
0.01uFC250
1000pF
D1.8V
C281
1000pF
C282
1000pF
C373
1000pF
D3.3V
C290
0.01uF
C375
0.1uF
C272
0.1uF
C248
1000pF
R205
20
C364
0.1uF
16V
C371
0.01uF
D1.2V
C366
0.1uF
C365
0.1uF
16V
A3.3V
D1.8V
C383
1000pF
C2005
0.01uF
C288
1000pF
C268
1000pF
C285
0.01uF
C283
1000pF
D3.3V
C381
0.1uF
COMP2_Pb
COMP2_Pr
COMP2_Y
AUD_SCK
AUD_LRCK
AUD_LRCH
REAR_AV_CVBS
SIDE_AV_CVBS
C122
4.7uF
C172
4.7uF
C140
4.7uF
C145
4.7uF
C164
10uF
C162
10uF
C165
10uF
C166
10uF
C163
10uF
C380
10uF
C379
10uF
C291
10uF
C263
4.7uF
C245
4.7uF
C280
4.7uF
C278
4.7uF
C297
4.7uF
C266
4.7uF
C369
4.7uF
C376
4.7uFC249
4.7uF
R142
OPT
R313 75
1%
NON_EU
R315 75
1%
NON_EU
R131
75
1%
R312
75
1%
R2114
0
C174
0.1uF
C175
0.1uF
C176
0.1uF
SIDE_COMP_Pb
SIDE_COMP_Pr
SIDE_COMP_INCM
SIDE_COMP_Y
R166
75
1%
C177
OPT
R167
75
1%
R120
82
1%
R165
82
1%
R2113
12
R2115
12
R143
62
R100
62
R135
75
1%
OPT
C170
47pF
C169 47pF
C101
47pF
A3.3V+3.3V_NORMAL
L112
CIC21J501NE
C2007
0.1uF
16V
+1.8V_HDMI+1.8V_AMP
C2008
0.1uF
16V
L111
BLM18PG121SN1D
HDMI_RX0+
HDMI_RX0-
HDMI_RX2+
HDMI_RX2-
HDMI_RX1-
HDMI_RX1+
HDMI_CLK-
HDMI_CLK+
SIDE_COMP_Y
SIDE_COMP_Pr
SIDE_COMP_Pb
SIDE_COMP_INCM
TU_IF_AGC_2
TU_IF_P_1
TU_IF_P_1
TU_IF_N_1
TU_IF_AGC_1
TU_IF_N_1
TU_IF_AGC_2
TU_IF_AGC_1
R135-*1
82 1%
NON_EU
C146
4.7uF
R2035
0
R2117
0
R2116
0
OPT
C287
100uF
C384
33uF
10V
IC100
LGE3556C (C0 VERSION)
DS_AGCI_CTL
AG28
DS_AGCT_CTL
AH28
EDSAFE_AVSS_1
AA21
EDSAFE_AVSS_2
AB22
EDSAFE_AVSS_3
AF26
EDSAFE_AVSS_4
AF27
EDSAFE_AVSS_5
AF28
EDSAFE_AVDD2P5
AG27
EDSAFE_DVDD1P2
AE26
EDSAFE_IF_N
AE28
EDSAFE_IF_P
AE27
PLL_DS_AGND
AD24
PLL_DS_AVDD1P2
AB19
PLL_DS_TESTOUT
AB25
SD_V5_AVDD1P2
AB18
SD_V5_AVDD2P5
AC17
SD_V5_AVSS
AB17
SD_V1_AVDD1P2
AD14
SD_V1_AVDD2P5
AD16
SD_V1_AVSS_1
AB15
SD_V1_AVSS_2
AC15
SD_V2_AVDD1P2
AD13
SD_V2_AVDD2P5
AE13
SD_V2_AVSS_1
AC13
SD_V2_AVSS_2
AB14
SD_V2_AVSS_3
AC14
SD_V3_AVDD1P2
AC12
SD_V3_AVDD2P5
AD12
SD_V3_AVSS_1
AB13
SD_V3_AVSS_2
AA14
SD_V4_AVDD1P2
AC11
SD_V4_AVDD2P5
AD11
SD_V4_AVSS
AB12
SD_R
AD10
SD_INCM_R
AC10
SD_G
AE9
SD_INCM_G
AF9
SD_B
AH9
SD_INCM_B
AG9
SD_Y1
AG15
SD_PR1
AE15
SD_PB1
AF15
SD_INCM_COMP1
AH15
SD_Y2
AG16
SD_PR2
AF16
SD_PB2
AH17
SD_INCM_COMP2
AH16
SD_Y3
AG14
SD_PR3
AE14
SD_PB3
AF14
SD_INCM_COMP3
AH14
SD_L1
AH10
SD_C1
AG10
SD_INCM_LC1
AE10
SD_L2
AE11
SD_C2
AF11
SD_INCM_LC2
AH11
SD_L3
AH13
SD_C3
AE12
SD_INCM_LC3
AF12
SD_CVBS1
AD9
SD_CVBS2
AG11
SD_CVBS3
AG12
SD_CVBS4
AF13
SD_INCM_CVBS1
AC9
SD_INCM_CVBS2
AF10
SD_INCM_CVBS3
AH12
SD_INCM_CVBS4
AG13
SD_SIF1
AF17
SD_INCM_SIF1
AG17
SD_FB
AD15
SD_FS
AE16
SD_FS2
AE17
PLL_VAFE_AVDD1P2
AB16
PLL_VAFE_AVSS
AA15
PLL_VAFE_TESTOUT
AC16
RGB_HSYNC
AG3
RGB_VSYNC
AF4
I2S_CLK_IN
AE18
I2S_CLK_OUT
AF18
I2S_DATA_IN
AD17
I2S_DATA_OUT
AH19
I2S_LR_IN
AD18
I2S_LR_OUT
AG18
AUD_LEFT0_N
AG26
AUD_LEFT0_P
AH26
AUD_AVDD2P5_0
AF23
AUD_AVSS_0_1
AA20
AUD_AVSS_0_2
AB21
AUD_AVSS_0_3
AC22
AUD_AVSS_0_4
AC23
AUD_AVSS_0_5
AD23
AUD_RIGHT0_N
AH25
AUD_RIGHT0_P
AG25
AUD_LEFT1_N
AH23
AUD_LEFT1_P
AG23
AUD_RIGHT1_N
AG24
AUD_RIGHT1_P
AH24
AUD_AVDD2P5_1
AE22
AUD_AVSS_1_1
AB20
AUD_AVSS_1_2
AC21
AUD_AVSS_1_3
AE23
AUD_LEFT2_N
AF21
AUD_LEFT2_P
AE21
AUD_RIGHT2_N
AF22
AUD_RIGHT2_P
AG22
AUD_AVDD2P5_2
AD21
AUD_AVSS_2_1
AC20
AUD_AVSS_2_2
AD22
AUD_SPDIF
AH2
SPDIF_AVDD2P5
AC6
SPDIF_AVSS
AE4
SPDIF_IN_N
AF3
SPDIF_IN_P
AH1
HDMI_RX_0_CEC_DAT
AG1
HDMI_RX_0_HTPLG_IN
AA6
HDMI_RX_0_HTPLG_OUT
AA5
HDMI_RX_0_DDC_SCL
AB3
HDMI_RX_0_DDC_SDA
Y6
HDMI_RX_0_RESREF
AC4
HDMI_RX_0_CLK_N
AC1
HDMI_RX_0_CLK_P
AC2
HDMI_RX_0_DATA0_N
AD1
HDMI_RX_0_DATA0_P
AD2
HDMI_RX_0_DATA1_N
AE1
HDMI_RX_0_DATA1_P
AE2
HDMI_RX_0_DATA2_N
AF1
HDMI_RX_0_DATA2_P
AF2
HDMI_RX_0_VDD3P3
AD3
HDMI_RX_0_VDD1P2
AE3
HDMI_RX_0_VDD2P5
AC3
HDMI_RX_0_AVSS_1
AD4
HDMI_RX_0_AVSS_2
AB5
HDMI_RX_0_AVSS_3
AB6
HDMI_RX_0_AVSS_4
AG2
HDMI_RX_0_AVSS_5
AB4
HDMI_RX_0_AVSS_6
AA7
HDMI_RX_0_PLL_AVSS
Y8
HDMI_RX_0_PLL_DVDD1P2
AC5
HDMI_RX_0_PLL_DVSS
W8
HDMI_RX_1_CEC_DAT
AA3
HDMI_RX_1_HTPLG_IN
V4
HDMI_RX_1_HTPLG_OUT
U6
HDMI_RX_1_DDC_SCL
V5
HDMI_RX_1_DDC_SDA
V3
HDMI_RX_1_RESREF
W4
HDMI_RX_1_CLK_N
W2
HDMI_RX_1_CLK_P
W3
HDMI_RX_1_DATA0_N
Y1
HDMI_RX_1_DATA0_P
Y2
HDMI_RX_1_DATA1_N
AA2
HDMI_RX_1_DATA1_P
AA1
HDMI_RX_1_DATA2_N
AB2
HDMI_RX_1_DATA2_P
AB1
HDMI_RX_1_VDD3P3
Y3
HDMI_RX_1_VDD1P2
Y4
HDMI_RX_1_VDD2P5
W5
HDMI_RX_1_AVSS_1
W1
HDMI_RX_1_AVSS_2
U5
HDMI_RX_1_AVSS_3
W6
HDMI_RX_1_AVSS_4
U7
HDMI_RX_1_AVSS_5
V7
HDMI_RX_1_AVSS_6
W7
HDMI_RX_1_AVSS_7
U8
HDMI_RX_1_AVSS_8
V8
HDMI_RX_1_AVSS_9
Y5
HDMI_RX_1_PLL_AVSS
V6
HDMI_RX_1_PLL_DVDD1P2
AA4
HDMI_RX_1_PLL_DVSS
Y7
IC100
LGE3556C (C0 VERSION)
VDDC_1
H8
VDDC_2
J8
VDDC_3
K8
VDDC_4
L8
VDDC_5
M8
VDDC_6
N8
VDDC_7
P8
VDDC_8
R8
VDDC_9
AA8
VDDC_10
H9
VDDC_11
H10
VDDC_12
H11
VDDC_13
H12
VDDC_14
H13
VDDC_15
H14
VDDC_16
H15
VDDC_17
H16
VDDC_18
H17
VDDC_19
H18
VDDC_20
H19
VDDC_21
H21
VDDC_22
J21
VDDC_23
K21
VDDC_24
L21
VDDC_25
M21
VDDC_26
N21
VDDC_27
P21
VDDC_28
R21
VDDC_29
T21
VDDC_30
U21
VDDC_31
V21
VDDC_32
W21
VDDC_33
Y21
AGC_VDDO
AH27
VDDO_1
AA12
VDDO_2
AA13
VDDO_3
AA18
VDDO_4
AA19
VDDO_5
E28
VDDO_6
L28
VDDO_7
U28
VDDO_8
AB28
DDRV_1
A9
DDRV_2
G9
DDRV_3
G11
DDRV_4
G13
DDRV_5
A14
DDRV_6
G15
DDRV_7
G17
DDRV_8
A19
DDRV_9
G19
IC100
LGE3556C (C0 VERSION)
DVSS_1
AD5
DVSS_2
AD6
DVSS_3
J7
DVSS_4
K7
DVSS_5
L7
DVSS_6
M7
DVSS_7
AB7
DVSS_8
AC7
DVSS_9
G8
DVSS_10
D9
DVSS_11
AA9
DVSS_12
G10
DVSS_13
A11
DVSS_14
L11
DVSS_15
M11
DVSS_16
N11
DVSS_17
P11
DVSS_18
R11
DVSS_19
T11
DVSS_20
U11
DVSS_21
V11
DVSS_22
D12
DVSS_23
G12
DVSS_24
L12
DVSS_25
M12
DVSS_26
N12
DVSS_27
P12
DVSS_28
R12
DVSS_29
T12
DVSS_30
U12
DVSS_31
V12
DVSS_32
L13
DVSS_33
M13
DVSS_34
N13
DVSS_35
P13
DVSS_36
R13
DVSS_37
T13
DVSS_38
U13
DVSS_39
V13
DVSS_40
G14
DVSS_41
L14
DVSS_42
M14
DVSS_43
N14
DVSS_44
P14
DVSS_45
R14
DVSS_46
T14
DVSS_47
U14
DVSS_48
V14
DVSS_49
L15
DVSS_50
M15
DVSS_51
N15
DVSS_52
P15
DVSS_53
R15
DVSS_54
T15
DVSS_55
U15
DVSS_56
V15
DVSS_57
A16
DVSS_58
G16
DVSS_59
L16
DVSS_60
M16
DVSS_61
N16
DVSS_62
P16
DVSS_63
R16
DVSS_64
T16
DVSS_65
U16
DVSS_66
V16
DVSS_67
AA16
DVSS_68
D17
DVSS_69
L17
DVSS_70
M17
DVSS_71
N17
DVSS_72
P17
DVSS_73
R17
DVSS_74
T17
DVSS_75
U17
DVSS_76
V17
DVSS_77
AA17
DVSS_78
AC19
DVSS_79
G18
DVSS_80
L18
DVSS_81
M18
DVSS_82
N18
DVSS_83
P18
DVSS_84
R18
DVSS_85
T18
DVSS_86
U18
DVSS_87
V18
DVSS_88
D20
DVSS_89
G20
DVSS_90
H20
DVSS_91
A21
DVSS_92
E21
DVSS_93
F21
DVSS_94
G21
DVSS_95
E22
DVSS_96
F22
DVSS_97
G22
DVSS_98
H22
DVSS_99
J22
DVSS_100
K22
DVSS_101
L22
DVSS_102
M22
DVSS_103
N22
DVSS_104
P22
DVSS_105
R22
DVSS_106
T22
DVSS_107
U22
DVSS_108
V22
DVSS_109
W22
DVSS_110
Y22
DVSS_111
AA22
DVSS_112
W23
DVSS_113
AB23
DVSS_114
F28
DVSS_115
M28
DVSS_116
T28
DVSS_117
AC28
R2112
181%
EU
R141 1%
EU
75
R2112-*1
125%
NON_EU
R141-*1
5%
NON_EU
62
R196
10
1%
R195 10
1%
3
CONNECT NEAR BCM CHIP
CVBS
COMPONENT
DSUB
SIDE COMPONENT
Place here for common circuit with ATSC
BT_LOUT_N
BT_LOUT_P
BT_ROUT_N
BT_ROUT_P
26page : TUNER(HALF NIM)
COMP1_Pr ==>
COMP1_Pb ==>
SC1_RGB(EU)/COMPNENT1[NON_EU]
COMP1_Y ==>
ONLY USE NON_EU
FOR COMP 1
FOR ESD
FOR ESD
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR Memory
BCM (EUROBBTV) 2009.06.18
DDR01_A[12]
DDR01_A[0]
DDR01_A[8]
DDR0_A[6]
DDR1_DQ[15]
DDR01_A[1]
DDR1_DQ[7]
DDR01_A[2]
DDR01_A[2]
DDR01_A[9]
DDR01_A[1]
DDR1_DQ[0]
DDR1_DQ[5]
DDR0_DQ[7]
DDR1_DQ[11]
DDR1_DQ[8]
DDR01_A[10]
DDR0_DQ[6]
DDR1_A[5]
DDR0_DQ[9]
DDR01_A[12]
DDR1_DQ[7]
DDR01_A[3]
DDR1_DQ[15]
DDR0_A[6]
DDR1_DQ[9]
DDR1_A[5]
DDR0_DQ[5]
DDR01_A[7]
DDR0_DQ[10]
DDR01_A[10]
DDR1_DQ[8]
DDR01_A[11]
DDR1_DQ[4]
DDR0_DQ[11]
DDR0_A[4]
DDR1_DQ[0]
DDR1_A[5]
DDR0_DQ[4]
DDR01_A[7]
DDR0_A[5]
DDR01_A[1]
DDR0_DQ[1]
DDR0_DQ[2]
DDR1_DQ[14]
DDR01_A[7]
DDR01_A[8]
DDR01_A[0]
DDR01_A[2]
DDR0_A[5]
DDR1_A[4]
DDR01_A[3]
DDR0_A[6]
DDR0_A[6]
DDR1_DQ[13]
DDR01_A[13]
DDR01_A[10]
DDR1_A[6]
DDR1_A[4]
DDR01_A[11]
DDR0_DQ[5]
DDR01_A[3]
DDR01_A[9]
DDR0_DQ[7]
DDR01_A[0]
DDR1_A[6]
DDR0_DQ[10]
DDR01_A[2]
DDR1_DQ[5]
DDR01_A[8]
DDR0_DQ[4]
DDR01_A[12]
DDR01_A[1]
DDR0_DQ[14]
DDR01_A[12]
DDR01_A[9]
DDR01_A[9]
DDR0_DQ[14]
DDR01_A[3]
DDR01_A[13]
DDR01_A[12]
DDR0_DQ[13]
DDR01_A[7]
DDR0_DQ[11]
DDR01_A[10]
DDR1_DQ[10]
DDR01_A[9]
DDR01_A[10]
DDR1_DQ[12]
DDR0_A[5]
DDR0_DQ[2]
DDR01_A[7]
DDR0_DQ[3]
DDR1_DQ[4]
DDR01_A[11]
DDR1_DQ[2]
DDR1_DQ[13]
DDR1_A[4]
DDR01_A[8]
DDR0_DQ[0]
DDR1_DQ[1]
DDR01_A[0]
DDR01_A[11]
DDR01_A[11]
DDR01_A[0]
DDR0_A[4]
DDR01_A[10]
DDR01_A[12]
DDR1_A[6]
DDR01_A[11]
DDR0_A[4]
DDR01_A[2]
DDR01_A[13]
DDR01_A[0]
DDR1_DQ[10]
DDR1_DQ[14]
DDR0_DQ[9]
DDR1_DQ[1]
DDR01_A[3]
DDR1_A[6]
DDR0_A[4]
DDR0_DQ[15]
DDR01_A[8]
DDR01_A[10]
DDR01_A[11]
DDR01_A[1]
DDR0_DQ[15]
DDR1_DQ[12]
DDR01_A[13]
DDR0_DQ[12]
DDR1_DQ[3]
DDR0_DQ[1]
DDR01_A[8]
DDR0_DQ[8]
DDR1_DQ[11]
DDR0_DQ[12]
DDR01_A[7]
DDR01_A[13]
DDR01_A[7]
DDR0_DQ[0]
DDR0_DQ[8]
DDR0_DQ[13]
DDR01_A[13]
DDR1_DQ[2]
DDR1_DQ[9]
DDR1_DQ[6]
DDR01_A[1]
DDR1_A[5]
DDR01_A[13]
DDR0_DQ[3]
DDR01_A[2]
DDR01_A[2]
DDR01_A[0]
DDR1_DQ[3]
DDR01_A[12]
DDR0_DQ[6]
DDR01_A[9]
DDR1_DQ[6]
DDR01_A[9]
DDR01_A[3]
DDR01_A[8]
DDR01_A[3]
DDR01_A[1]
DDR0_A[5]
DDR1_A[4]
DDR1_VREF0
DDR1_DQS1
004:H3
DDR0_CLKb
004:C7;004:C4
DDR0_VREF0
DDR1_CLK
004:A7;004:F4
DDR01_CASb
C477
0.1uF
C479
470pF
C455
0.1uF
DDR01_CASb
C441
0.047uF
C466
0.1uF
DDR1_A[4-6]
R407
100
1%
C491
0.1uF
C482
0.047uF
DDR01_BA2
DDR01_BA0
R409 75
C406
0.1uF
DDR01_WEb
D1.8V
DDR0_DQS1b
004:E3
DDR01_A[0-3,7-13]
DDR01_BA0
AR408
75
DDR01_BA1
C478
0.047uF
C409
470pF
D1.8V
DDR01_BA0
DDR1_DQ[0-7]
DDR0_DM0
004:E6
DDR01_WEb
DDR01_CKE
C492
0.1uF
DDR01_BA2
C464
470pF
DDR0_DQS0
004:A4
DDR01_CASb
DDR1_DQS0
004:A4
AR403
75
DDR01_A[7-13]
DDR0_DQ[0-7]
004:B6
DDR01_BA1
D1.8V
DDR01_CKE
DDR01_A[0-3,7-13]
C442
0.1uF
DDR01_CASb
DDR01_BA1
DDR01_A[0-3]
DDR01_WEb
DDR01_BA1
DDR01_WEb
DDR01_WEb
DDR01_CKE
DDR1_DQS0
004:H6
D1.8V
DDR01_BA2
DDR01_BA0
C453
470pF
DDR01_RASb
C445
0.047uF
DDR1_DQ[0-7]
004:B5
DDR1_CLK
C4030.1uF
DDR01_BA2
C408
470pF
C465
0.047uF
R410 75
DDR01_ODT
C415
0.1uF
DDR01_WEb
AR404
75
C463
470pF
C471
0.047uF
DDR01_BA0
DDR01_BA0
DDR0_VREF0
C460
0.047uF
DDR0_DQS1
004:E3
C493
0.1uF
DDR01_WEb
C459
0.1uF
C402
470pF
R408 75
AR409
75
DDR01_BA1
DDR0_DM1
004:E3
DDR1_CLK
004:F7;004:F4
DDR0_A[4-6]
DDR01_BA0
DDR01_CASb
DDR0_A[4-6]
AR407
75
C456
0.047uF
DDR01_BA2
DDR0_CLK
004:A7;004:C7
DDR1_DQ[8-15]
DDR_VTT
DDR01_BA1
DDR1_DQS0b
004:A3
DDR01_CKE
004:A7;004:C7;004:F7;004:F4
DDR01_CKE
DDR0_CLKb
004:A7;004:C4
C440
470pF
R404 75
DDR01_RASb
C481
0.1uF
DDR01_ODT
C470
470pF
DDR0_DQ[0-7]
C400
470pF
DDR0_CLKb
004:A7;004:C7
DDR1_DQS1b
004:A3
AR406
75
DDR01_ODT
D1.8V
C484
0.1uF
DDR0_DM0
004:A4
DDR1_A[4-6]
004:B6;004:F6;004:I7
C461
470pF
DDR01_ODT
DDR0_DQ[8-15]
DDR1_VREF0
DDR01_BA1
DDR01_A[0-3,7-13]
C450
0.1uF
DDR01_ODT
004:A7;004:C5;004:C2;004:F2;004:I4;004:I6
DDR01_RASb
DDR1_CLKb
004:F7;004:F4
DDR01_RASb
C462
470pF
D1.8V
DDR01_RASb
C467
0.1uF
C446
0.1uF
DDR01_A[0-3,7-13]
DDR1_A[4-6]
004:B6;004:F3;004:I7
AR401
75
DDR01_A[0-3,7-13]
DDR1_DM1
004:H3
DDR0_DQS1b
004:A4
DDR1_DQS1b
004:H3
DDR1_DQS1
004:A3
DDR01_ODT
DDR0_DM1
004:A4
C495
470pF
DDR01_BA2
D1.8V
DDR0_CLK
004:A7;004:C4
DDR0_DQS0
004:E6
C468
0.1uF
DDR0_VREF0
C4040.1uF
DDR01_RASb
C452
470pF
DDR1_CLKb
004:A7;004:F4
C449
0.1uF
DDR0_A[4-6]
DDR0_DQ[8-15]
C475
22uF
C451
22uF
R406
100
1%
DDR0_DQS0b
004:A4
DDR_VTT
C483
0.1uF
C457
470pF
DDR01_RASb
DDR1_CLKb
R412 240
1%
C444
470pF
C494
0.1uF
DDR1_DM0
004:H6
DDR01_CASb
A1.2V
DDR0_CLK
004:C7;004:C4
AR405
75
C472
0.1uF
DDR1_DM1
004:A4
AR400
75
DDR1_DQS0b
004:H6
AR402
75
DDR1_DM0
004:A4
DDR0_A[4-6]
DDR1_A[4-6]
DDR1_DQ[8-15]
004:B5
DDR0_DQS0b
004:E6
R411 0
OPT
DDR01_ODT
DDR1_VREF0
DDR01_BA2
DDR0_DQS1
004:A4
C473
10uF
C476
10uF
C454
10uF
C448
10uF
C469
10uF
C443
10uF
C480
10uF
C458
10uF
C401
1uF
C410
1uF
C407
1uF
C405
1uF
C474
10uF
C447
10uF
C496
0.1uF
C497
0.1uF
C498
0.1uF
C490
0.1uF
C487
0.1uF
C486
0.1uF
C488
0.1uF
C485
0.1uF
C489
0.1uF
C499
0.1uF
C421
0.1uF
DDR01_CKE
DDR01_CKE
R417
220
C425
22uF
10V
C412
0.1uF
16V
R414 0
C417
10uF
10V
C419
10uF
10V
DDR1_VREF0
C416
10uF
10V
C418
1uF
10V
C414
0.1uF 16V
DDR_VTT
R418
10K
R415 0
C422
1uF
10V
C426
22uF
10V
D3.3V
C413
0.1uF
16V
D1.8V
C423
10uF
10V
C411
0.1uF
16V
IC404
BD35331F-E2
3
VTTS
2
EN
4
VREF
1
GND
5
VDDQ
6
VCC
7
VTT_IN
8
VTT
C420
0.1uF
16V
DDR0_VREF0
IC403
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
NC_1/BA2
G1
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
A13
L8
NC_2/A14
L3
NC_3/A15
L7
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
IC402
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
NC_1/BA2
G1
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
A13
L8
NC_2/A14
L3
NC_3/A15
L7
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
IC401
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
NC_1/BA2
G1
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
A13
L8
NC_2/A14
L3
NC_3/A15
L7
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
IC400
NT5TU128M8DE_BD
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
NC_1/BA2
G1
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
A13
L8
NC_2/A14
L3
NC_3/A15
L7
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
IC100
LGE3556C (C0 VERSION)
DDR_BVDD0
A6
DDR_BVDD1
A24
DDR_BVSS0
B7
DDR_BVSS1
B24
DDR_PLL_TEST
F20
DDR_PLL_LDO
B23
DDR01_CKE
B17
DDR_COMP
C22
DDR01_ODT
E16
DDR_EXT_CLK
C23
DDR0_CLK
B12
DDR0_CLKB
C12
DDR1_CLK
A13
DDR1_CLKB
A12
DDR01_A00
B15
DDR01_A01
E14
DDR01_A02
A15
DDR01_A03
D15
DDR0_A04
E13
DDR0_A05
E12
DDR0_A06
F13
DDR01_A07
C14
DDR01_A08
F14
DDR01_A09
B14
DDR01_A10
D14
DDR01_A11
C13
DDR01_A12
D13
DDR01_A13
B13
DDR1_A04
F15
DDR1_A05
C15
DDR1_A06
D16
DDR01_BA0
F16
DDR01_BA1
B16
DDR01_BA2
E15
DDR01_CASB
A17
DDR0_DQ00
A8
DDR0_DQ01
B11
DDR0_DQ02
B8
DDR0_DQ03
D11
DDR0_DQ04
E11
DDR0_DQ05
C8
DDR0_DQ06
C11
DDR0_DQ07
C9
DDR0_DQ08
D8
DDR0_DQ09
E10
DDR0_DQ10
E9
DDR0_DQ11
F11
DDR0_DQ12
F12
DDR0_DQ13
E8
DDR0_DQ14
D10
DDR0_DQ15
F8
DDR1_DQ00
C18
DDR1_DQ01
C20
DDR1_DQ02
A18
DDR1_DQ03
B21
DDR1_DQ04
C21
DDR1_DQ05
B18
DDR1_DQ06
B20
DDR1_DQ07
D18
DDR1_DQ08
E18
DDR1_DQ09
D21
DDR1_DQ10
F18
DDR1_DQ11
E20
DDR1_DQ12
A22
DDR1_DQ13
F17
DDR1_DQ14
B22
DDR1_DQ15
E17
DDR0_DM0
A10
DDR0_DM1
C10
DDR1_DM0
A20
DDR1_DM1
F19
DDR0_DQS0
B10
DDR0_DQS0B
B9
DDR0_DQS1
F10
DDR0_DQS1B
F9
DDR1_DQS0
B19
DDR1_DQS0B
C19
DDR1_DQS1
E19
DDR1_DQS1B
D19
DDR01_RASB
C16
DDR_VREF0
A7
DDR_VREF1
A23
DDR01_WEB
C17
DDR_VDDP1P8_1
C7
DDR_VDDP1P8_2
D22
4
HONG YEON HYUK
Close to IC
Close to IC
Close to IC
Close to IC
SI
SI
PI
* DDR_VTT
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.06.18EUROBBTV
R914
10K
OPT
C909
47pF
50V
REAR_AV
HP_LOUT
+3.3V_NORMAL
R920
470K
REAR_AV
D909
5.6V
REAR_AV
R912
1K
R925
10K
REAR_AV
R921
470K
REAR_AV
JK902
PPJ233-01
REAR_AV
4A
[YL]O-SPRING
5A
[YL]E-LUG
3A
[YL]CONTACT
4B
[WH]C-LUG
5C
[RD]E-LUG
4C
[RD]O-SPRING
3C
[RD]CONTACT
HP_DET
Q901
MMBT3904-(F)
OPT
E
B
C
JK901
KJA-PH-0-0177
3DETECT
4L
5GND
1R
REAR_AV_R_IN
Q902
MMBT3904-(F)
OPT
E
B
C
HP_ROUT
SIDE_HP_MUTE
C902
1000pF
50V
OPT
Q900
MMBT3904-(F)
OPT
E
B
C
D908
5.6V
REAR_AV
R926
1K
REAR_AV
REAR_AV_CVBS
R917
10K
+3.3V_NORMAL
Q903
MMBT3904-(F)
OPT
E
B
C
+3.5V_ST
D907
5.6V
REAR_AV
C903
1000pF
50V
OPT
REAR_AV_L_IN
AV_CVBS_DET
JK900
PPJ234-01
5A
[GN]O-SPRING
6A
[GN]E-LUG
4A
[GN]CONTACT
7B
[BL]E-LUG-S
5B
[BL]O-SPRING
7C
[RD]E-LUG-S
5C
[RD]O-SPRING_1
5D
[WH]O-SPRING
4E
[RD]CONTACT
5E
[RD]O-SPRING_2
6E
[RD]E-LUG
COMP2_Pr
COMP2_DET
5.6V
D902
D900
5.6V
D901
5.6V
R907
470K
COMP2_R_IN
+3.3V_NORMAL
COMP2_L_IN
COMP2_Pb
COMP2_Y
R902
10K
R903
1K
0
R957
REAR_AV
C910
100pF
50V
REAR_AV
C941
1uF
25V
REAR_AV
C940
1uF
25V
REAR_AV
R927
0
REAR_AV
R928
0
REAR_AV
C916
100pF
50V
REAR_AV
C915
100pF
50V
REAR_AV
C931
100pF
50V
C904
27pF
50V
L904
270nH
C932
27pF
50V
C906
27pF
50V
C933
27pF
50V
L903
270nH
C934
27pF
50V
C905
27pF
50V
L902
270nH
C939
100pF
50V
C935
1uF
25V
R910
0
R961
470K
C936
1uF
25V
C937
100pF
50V
R909
0
D904
5.5V
D905
5.5V
D906
5.5V
REAR_AV
D910
5.1V
D903
5.1V
9
ETC SUB BOARD I/F
EARPHONE BLOCK
New Item Development
COMPONENT
Rear CVBS
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
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LG Electronics 47LE730N-ZA User manual

Category
TVs & monitors
Type
User manual
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