Texas Instruments Implementation of Power Supply Volume Control Application notes

Brand: Texas Instruments

Model: Implementation of Power Supply Volume Control

Type: Application notes

Application Report

SLEA038 – July 2004

Implementation of Power Supply Volume Control

Tomas Bruunshuus Texas Instruments Copenhagen

ABSTRACT

This document gives design guide lines for applications using the power supply volume

control (PSVC). The power supply volume control increases system performance by:

• Volume can be decreased without loss of audio resolution, in the range where PSVC is

active.

• When supply voltage for PVDD is decreased, the noise voltage at the output decreases as

well. The ratio between noise voltage and maximum RMS voltage (DNR) then increases.

The user experiences better noise performance at usual listening levels. E.g. a system

having 102 dB in DNR and a power supply range of 18 dB will have a SNR up to 120 dB.

• Reduces power consumption and heat in the system at usual listening levels, thereby

increasing the lifetime of the system.

• Many EMI tests are performed at a reduced volume setting. FTC requires 1/8 of maximum

output power equal to a volume setting of -9 dBFS. By use of the PSVC operating voltage

during EMI, the test will be reduced giving reduced switching noise in the system.

The PSVC is supported in Texas Instruments PWM processors like the TAS5508, which

makes implementation easy. For other modulator types like the TAS5066 and TAS5076,

the PSVC can also be implemented. However, on these devices all calculations and

control must be handled by the micro controller.

This document gives design guidelines, how to implement PSVC correctly for the

TAS5508. To implement PSVC for other PWM processors like the TAS5066 and

TAS5076, contact the Texas Instruments digital audio applications team.

SLEA038

2 Implementation of Power Supply Volume Control

Contents

Introduction .....................................................................................................................................3

1.1 PSVC Advantages.....................................................................................................................3

1.2 PSVC Concept ..........................................................................................................................3

2 General Structure............................................................................................................................5

2.1 Examples of Gain Settings ........................................................................................................7

2.1.1 Gain Setting Within the PSU Range..............................................................................7

2.1.2 Gain Setting Higher Than the PSU Range ....................................................................7

2.1.3 Gain Setting Lower Than the PSU Range.....................................................................7

2.2 Power Supply Control................................................................................................................8

2.3 TAS5508 PSVC PWM Output ...................................................................................................9

2.4 Programming the TAS5508 for PSVC.....................................................................................10

3 Power Supply Implementation.....................................................................................................12

3.1 TAS5508 0% Duty Cycle Handling..........................................................................................12

3.2 Power Supply Sink / Source....................................................................................................13

4 DC/DC Converter Application Example ......................................................................................15

4.1 Implementation........................................................................................................................15

References.............................................................................................................................................16

Figures

Figure 1.

Digital and Power Supply Gain .........................................................................................4

Figure 2. Resulting Gain ....................................................................................................................4

Figure 3. Volume Calculation Flow Chart ........................................................................................6

Figure 4. Control of the Power Supply .............................................................................................8

Figure 5. PSVC PWM Pulse ...............................................................................................................9

Figure 6. Configuration Using PWM .................................................................................................9

Figure 7. PSVC Output of the TAS5508..........................................................................................10

Figure 8. PSVC With Saturation ......................................................................................................12

Figure 9. PSVC With Shutdown ......................................................................................................13

Figure 10. Basic Schematic for a Buck Converter ..........................................................................13

Figure 11. Buck Converter Using Synchronous Rectification .......................................................14

Figure 12. Use of a Bleeder Resistor to Sink Current.....................................................................14

Tables

Table 1.

System Control Register 1 (0x03) ...................................................................................10

Table 2. PSVC Range Register (0xDF) ..........................................................................................11

Table 3. General Control Register (0xE0) .....................................................................................11

SLEA038

Implementation of Power Supply Volume Control 3

1 Introduction

1.1 PSVC Advantages

Using a combination of digital gain and power supply to the control volume setting gives several

advantages:

• Volume can be decreased without loss of audio resolution, in the range where PSVC is

active.

• When supply voltage for PVDD is decreased, the noise voltage at the output decreases as

well. The ratio between noise voltage and maximum RMS voltage (DNR) then increases.

The user experiences better noises performance at usual listening levels. E.g. a system

having 102 dB in DNR and a power supply range of 18 dB will have an SNR up to 120 dB.

• Reduces power consumption and heat in the system at usual listening levels. Thereby

increasing lifetime of the system.

• Many EMI tests are performed at reduced volume setting. FTC requires 1/8 of maximum

output power equal to a volume setting of -9 dBFS. By use of PSVC, the operating voltage

during EMI test will be reduced, giving reduced switching noise in the system.

With only a minimum extra complexity audio performance can be improved and EMI tests

become easier to pass.

1.2 PSVC Concept

Speaker output voltage can at be calculated as:

PSUSPEAKER

VtdtV

⋅

= )()(

Where d is the duty cycle that varies according to the audio signal and V

PSU

is the power supply

voltage. From this equation it can be seen that the output volume can be controlled from either

the duty cycle or the power supply voltage. Note that when the output volume level is calculated

in dB, the following formula is used:

)()()( dBVdBddBV

PSUSPEAKER

Using this formula it becomes easier to calculate total output volume. The concept pf PSVC is to

have the power supply to control from 0 dBFS to e.g. -24 dBFS and then use digital gain to

control volume above 0 dBFS and below -24 dBFS. The lower crossover point (e.g. -24 dBFS)

can be selected differently depending on the power supply configuration.

SLEA038

4 Implementation of Power Supply Volume Control

Power Supply Volume Control

-60

-50

-40

-30

-20

-10

-80 -70 -60 -50 -40 -30 -20 -10 0 10 20 30

Gain (dB)

Digital & Power Supply Gain (dB)

Digital Gain Power Supply Gain

Figure 1. Digital and Power Supply Gain

Figure 1 shows gain settings for both digital circuits and a power supply at different desired

gains. The resulting gain (or volume level) is the two gains, digital and power supply gain, added

together. This is shown in Figure 2 according to the previous formula.

Power Supply Volume Control

-80

-60

-40

-20

-100 -80 -60 -40 -20 0 20 40 60

Desired Gain (dB)

Resulting Gain (dB)

Digital Gain Power Supply Gain Digital Gain

Figure 2. Resulting Gain

The resulting gain is linear to the desired gain, where the power supply controls the gain from

-24 dBFS to 0 dBFS.

SLEA038

Implementation of Power Supply Volume Control 5

Note that minimum power supply gain (lower crossover point of -24 dBFS) must be selected

different depending on the power supply capability, e.g. -18 dBFS or -12 dBFS.

2 General Structure

To set the volume correctly, the volume setting must be split into a digital gain setting and a

power supply gain setting. Care must be taken to get these calculations right. Especially the

calculations at the two crossover points can cause non linear volume control if not done

correctly. The TAS5508 automatically calculates settings for digital gain and power supply gain.

A flow chart to calculate volume settings is shown in Figure 3. The principle is to set the power

supply volume according to the channel having the highest volume setting and then recalculate

gain setting for the digital circuits. The TAS5508 uses a sequence based on this flow chart to

calculate gain settings for digital gain and power supply gain.

SLEA038

6 Implementation of Power Supply Volume Control

Find Channel with highest

volume setting - channel_x

Channel1_volume

Channel2_volume

Channel n_volume

Calculate PSU setting for

channel_x

Is PSU setting

within PSU range

PSU_volume = 0 dB PSU_volume = min. dB

Calculate digital gain as:

Channel1_digital = Channel1_volume - PSU_volume

Channel2_digital = Channel2_volume - PSU_volume

Channel n_digital = Channel n_volume - PSU_volume

Higher Lower

Within

range

Figure 3. Volume Calculation Flow Chart

SLEA038

Implementation of Power Supply Volume Control 7

2.1 Examples of Gain Settings

The following examples are for a three channel system. The power supply can be controlled

from -18 dB to 0 dB.

2.1.1 Gain Setting Within the PSU Range

System requirement settings:

Channel1_volume = -14 dB

Channel2_volume = -28 dB

Channel3_volume = -22 dB

Channel 1 is found to have the highest volume setting of -14 dB. The PSU_volume is then set to

-14 dB.

Digital gain is then calculated as:

Channel1_digital = -14 dB – (-)14 dB = 0 dB

Channel2_digital = -28 dB – (-)14 dB = -14 dB

Channel3_digital = -22 dB – (-)14 dB = -8 dB

2.1.2 Gain Setting Higher Than the PSU Range

System requirement settings:

Channel1_volume = -14 dB

Channel2_volume = 4 dB

Channel3_volume = -22 dB

Channel 2 is found to have the highest volume setting of +4 dB. The PSU_volume is then set to

0 dB, which is highest setting for the power supply.

Digital gain is then calculated as:

Channel1_digital = -14 dB – 0 dB = -14 dB

Channel2_digital = 4 dB – 0 dB = 4 dB

Channel3_digital = -22 dB – 0 dB = -22 dB

2.1.3 Gain Setting Lower Than the PSU Range

System requirement settings:

Channel1_volume = -28 dB

Channel2_volume = -28 dB

SLEA038

8 Implementation of Power Supply Volume Control

Channel3_volume = -22 dB

Channel 3 is found to have the highest volume setting -22 dB. The PSU_volume is then set to

-18 dB, which is lowest setting for the power supply.

Digital gain is then calculated as:

Channel1_digital = -28 dB – (-)18 dB = -10 dB

Channel2_digital = -28 dB – (-)18 dB = -10 dB

Channel3_digital = -22 dB – (-)18 dB = -4 dB

2.2 Power Supply Control

The output voltage of the power supply PVDD is controlled by adjusting the reference voltage.

The control loop in the power supply uses this reference voltage to regulate the output. When

the reference voltage is changed, PVDD will change accordingly.

-1

SMPS

Feed Back

reference

PVDD

Figure 4. Control of the Power Supply

The reference voltage must be controlled from the TAS5508. If the reference voltage is an

analog voltage that has to pass from the TAS5508 at the amplifier board to the power supply

board, the output voltage of the power supply will be erroneous. The voltage may drop when

crossing from one board to the next. This makes the volume setting inaccurate. Also, if noise or

hum is injected into the reference voltage, this noise will be coupled into the power supply output

and then into the speaker output.

This is solved in the TAS5508 by using a PWM signal instead of an analog reference voltage.

SLEA038

Implementation of Power Supply Volume Control 9

Lowest Power Supply

Voltage Pulse

Maximum Power Supply

Voltage Pulse

Figure 5. PSVC PWM Pulse

The PSVC PWM pulse has a duty cycle corresponding to the power supply volume setting. The

advantage is that all volume information is independent of the voltage level. This means that any

voltage drop can be compensated by reclocking the PWM signal at the power supply board.

PWM pulses are then converted to the analog reference voltage through a low-pass filter.

-1

74LVC126

SMPS

Feed Back

Reference

PSVC PWM

10 kΩ

1 kΩ

100 nF

1 uF

PVDD

Figure 6. Configuration Using PWM

The PSVC PWM frequency must be above 20 kHz to insure that no audible leftovers from PSVC

PWM are coupled into the speaker outputs.

2.3 TAS5508 PSVC PWM Output

When PSVC is enabled, the TAS5508 generates a PWM signal at a frequency of 44.1 kHz or

48 kHz. The PWM frequency is synchronized to the LRCLK of the I2S.

SLEA038

10 Implementation of Power Supply Volume Control

Lowest Power Supply

voltage Pulse > 120 out of

2048

Maxi mum Power Suppl y

Voltage

Pulse =

1944 out of 2048

Figure 7. PSVC Output of the TAS5508

The output has a maximum duty cycle of 95% corresponding to 0 dBFS and a minimum duty

cycle of 6% corresponding to -24-dB attenuation.

Note that during start up, error recovery, and reset the duty cycle is 0%, 0 V. This can be

changed by programming system control register 1 (0x03).

Table 1. System Control Register 1 (0x03)

D7 D6 D5 D4 D3 D2 D1 D0 Function

0 - - - - - - - PWM High Pass Disabled

1 - - - - - - - PWM High Pass Enabled

- 0 - - - - - - /Auto Clock Set

- 1 - - - - - - Manual Clock Set

- - - 0 - - - Soft Unmute on Recovery from Clock Error

- - - 1 - - - Hard Unmute on Recovery from Clock Error

- - - - 1 - - - PSVC Hi-Z Enable

- - - - 0 - - - PSVC Hi-Z Disable

0 0 0 1 0 0 0 0 Default Setting

D0 to D2 is unused bits.

If D3 bit is set high, the PSVC output will go into Hi-Z during error recovery. This is however not

recommended, since this interferes with the reclocking gate at the power supply board, causing

PVDD voltage to be too high. For most applications, PSVC Hi-Z must remain disabled.

The function of D4 to D7 is not covered in this document, see Reference 1.

2.4 Programming the TAS5508 for PSVC

The TAS5508 modulator has a PWM output for the power supply control. This provides an easy

implementation of the PSVC. The modulator does all calculations to get the correct volume

setting and generates the PSVC PWM pulse required at a frequency of 44.1 kHz or 48 kHz,

depending on the audio sample rate.

SLEA038

Implementation of Power Supply Volume Control 11

The TAS5508 can be configured to provide PSVC with 12.04-dB, 18.06-dB, or 24.08-dB

attenuation of the power supply. The attenuation level should be selected as high as possible.

The limiting factor is that the power supply must remain stable at all power levels. Some power

supplies can have difficulties when regulating over a wide voltage range. Hence, the PSVC

range must be selected smaller.

The PSVC control range is set in register 0xDF.

Table 2. PSVC Range Register (0xDF)

D31 – D2 D1 D0 Function

0 0 0 0 12.04-dB control range for PSVC

0 0 0 1 18.06-dB control range for PSVC

0 0 1 0 24.08-dB control range for PSVC

0 0 1 1 Ignore – retain last value

0 0 1 0 Default Setting

Subwoofer configuration must be selected. In case that the subwoofer output is a line output, the

digital volume setting is not to be affected when setting the power supply volume.

This is done in register 0xE0. This register also enables/disables the PSVC.

Table 3. General Control Register (0xE0)

D31 – D4 D3 D2 D1 D0 Function

0 - 0 /8 Channel Configuration

0 - 1 6 Channel configuration

0 0 - Power Supply Volume Control Disable

0 1 - Power Supply Volume Control Enable

0 0 - - Subwoofer Part of PSVC

0 1 - - Subwoofer Separate from PSVC

0 0 0 0 0 Default Setting

The D1 bit is used to select between eight channel configuration and six channel configuration.

This item is not covered in this document.

The D2 bit is used to enable/disable PSVC. Default is disabled. When PSVC is disabled, the

output of PSVC is 0. All volume control is performed using digital gain only. Enabling of the

PSVC starts the PSVC PWM. The TAS5508 automatically calculates the volume setting for the

power supply and digital volume for all channels based on the flow chart shown in Figure 3.

If D3 is set to 1, the subwoofer channel (channel 8) is not included in the PSVC, only digital

volume is used. This is needed if the subwoofer output is a line out (e.g. a 7.1 system using

active subwoofer).

SLEA038

12 Implementation of Power Supply Volume Control

3 Power Supply Implementation

3.1 TAS5508 0% Duty Cycle Handling

As discussed in the previous section, the TAS5508 during start up and error recovery has a

PSVC output of 0% duty cycle. The power supply must then be able to handle this situation

properly. When the reference voltage to the power supply is 0 V, PVDD will also be 0 V if no

special arrangements are made.

NOTE: Texas Instruments power stages can handle PVDD being 0 V, since no audio is present

during these events. Texas Instruments power stages does not need protection against PVDD =

0 V. However, the power supply must not be damaged nor become unregulated during these

events.

If the power supply cannot handle a 0-V output, the following arrangements can be made:

-1

74LVC126

SMPS

Feed Back

Reference

PWM

ref

10 kΩ

1 kΩ

100 nF

1 uF

PVDD

Figure 8. PSVC With Saturation

Figure 8 shows a power supply implementation, where PVDD is kept at a minimum voltage

when PWM is 0%. The voltage is set by a resistor divider and the forward drop of the diode.

Another way of controlling 0% situation is to shut down the power supply when the duty cycle

falls below a given level. This is shown in Figure 9.

SLEA038

Implementation of Power Supply Volume Control 13

-1

/shutdown

74LVC126

SMPS

Feed Back

Reference

10 kΩ

1 kΩ

100 nF

1 uF

10 kΩ

10 nF

PVDD

PWM

ref

74LVC126

Figure 9. PSVC With Shutdown

3.2 Power Supply Sink / Source

Most power supplies are only capable of sourcing current. This is due to implementation of the

rectifying circuit on output. In most cases, this is done by using a rectifying diode.

Figure 10 shows basic components for a buck converter. The buck converter creates an output

voltage (PVDD) lower than its input voltage (V

). It can be seen that current can only flow out of

the converter due to the direction of the diode and since the input voltage is higher than the

output voltage, no current can flow from the PVDD to V

. Decreasing of the output voltage can

only happen by loading the output.

PVDD

Current

Source

Figure 10. Basic Schematic for a Buck Converter

SLEA038

14 Implementation of Power Supply Volume Control

When using PSVC, this can cause a problem when ramping down volume. When the volume is

ramped down, the PVDD voltage must decrease. If the power supply can only source current,

only the amplifier load can decrease the PVDD voltage. This causes an uncontrolled ramp down

of the volume.

To make the power supply able to sink current as well, one of following solutions is

recommended.

Use of synchronous rectification. The basic theory is to replace the rectifying diode with a

controlled MOSFET. A controlled MOSFET has the advantage to allow current in both directions

when turned on. Actual implementation of a synchronous rectification depends on the power

supply topology. Figure 11 shows an example of synchronous rectification for a buck converter.

PVDD

Current Sink/Source

Figure 11. Buck Converter Using Synchronous Rectification

Use of bleeder resistor. A resistor can be placed at the PVDD output to bleed down the output

voltage. In order not to decrease efficiency, this resistor must be connected through a switch or

a transistor. The bleeder resistor will then only be active when needed.

Figure 12 shows how a controlled bleeder resistor can be used to decrease the output voltage.

The bleeder resistor is turned on by the switch when the PVDD voltage is too high.

Current

Source

PVDD

Current

Sink

Figure 12. Use of a Bleeder Resistor to Sink Current

SLEA038

Implementation of Power Supply Volume Control 15

4 DC/DC Converter Application Example

The following application example is a dc/dc converter optimized for the full advantage of the

TAS5508. The converter is designed for:

• Input voltage 50 V to 55 V

• Output voltage 2 V to 40 V, giving the full 24.08-dB attenuation provided by the TAS5508

• Current limitation level set to 12 A

4.1 Implementation

The power supply is designed with the possibility to use remote voltage sensing, which improves

audio performance, see Reference 2. The output voltage is sensed through a separate

connector J704 pin 2. The voltage can then be sensed at the amplifier board eliminating

impedances in wires and connectors.

For using the PSVC, a jumper must be placed at J703 between pin 1 and pin 2. If a manual

voltage setting is required, the jumper must be placed between pin 2 and pin 3.

The PWM input for power supply control from the TAS5508 is at J703 pin 5. The input has a

pulldown resistor, R827, to insure that the output voltage drops to 0 V in case of loss of PWM

input. To restore the PWM signal and adapt it to the power supply reference voltage, the PWM

input is reclocked in an AND-gate, U703. This removes voltage drops and noise that might have

been injected in the transmission from the modulator to the power supply. Converting the PWM

signal level to the power supply reference voltage improves the accuracy of the output voltage.

The converter itself is a BUCK topology. Basic components can be identified as: C708, C710,

C711, and C712 as the input capacitor, Q706 and Q707, L704 and C725 plus capacitors at the

amplifier board as the output capacitor. U706 is an integrated power supply controller.

Synchronous rectification is used in this application. Q707 is the synchronous rectifier instead of

a diode. The dc/dc converter is then capable of transferring current from output side to the input

side.

Since the dc/dc converter can be supplied from a rectified transformer output, there must be a

bleeder at the primary side, to be able to sink current. The bleeder resistor is R707 and is

controlled by Q701. Q701 is turned on by U701C, if the input voltage exceeds 65 V.

SLEA038

16 Implementation of Power Supply Volume Control

References

1. TAS5508 – 8 Channel Digital Audio PWM Processor (SLES091)

2. Power Supply Considerations for A/V Receivers (SLEA028)

A A

B B

BAV70

D704

BAV70

D705

1 2

BAV70

D708

1 2

D701

BAV70

V+

V-

U701C

LM339

V+

V-

U701D

LM339

V+

V-

U701A

LM339

V+

V-

U701B

LM339

Q701

IRF540

Q706

IRF540

Q707

IRF540

R758

510R

R759

510R

220p

C756

220p

C751

100p

C755

82R

R750

5k6

R752

22p

C747

1k0

R753

C748

C746

100p

100n

C744

100n

C743

R744

510R

100n

C745

100k

R820

120kR821

R822

100R

R823

100R

R794

82k

R796

82k

C778

100n

C779

10n

C714

100n

C713

220p

R703

120k

R706

2k7

C715

47u

100n

C716

R709

100k

R707

82R

R708

10k

R710

8k2

R704

10k

R705

220k

2k7

R699

R749

3k3

R760

5k6

R761

8k2

R762

1k5

R747

27k

R748

8k2

C749

22p

C750

4n7

R746

270k

R754

1k8

R755

1k0

R745

5k6

33k NTC

R802

R800

30k

R799

10k

R798

33k

R801

R795

R797

100n

C752

C753

10u

C758

220n

ADJ

ILIM

VA-

VA+

VAO

CA-

CAO

CS+

CS-

CSO

ENBL

SEQ

KILL

VREF

RUN

VCC

OUT

GND

VEE

CLKSYN

RDEAD

OSC

U706

UC3849DW

R711

470k

C741

1nF

100R

R742

R743

7k5

5k6

R751

L701

L702

R701

10R

R702

10R

C701

100n

C702

10n

C703

100n

C704

10n

C707

10n

100n

C706

1 2

J701

1 2

J702

C705

1000u

C708

1000u

C710

1000u

C711

1000u

C712

1000u

10R

R700

R725

4k7

R721

4k7

R720

R718

10k

R717

20k

C718

22p

Q704

20k

R713

10k

R714

Q703

22p

C717

Q705

20k

R722

20k

R697

R726

2R7

R727

2R7

C719

22p

C720

22p

R728

C722

100n

Vdd

Vss

U702

HIP2100

2R7

R695

C728

Q712

2R7

R696

C724

10n

C723

10n

75nH

L703

R724

3R3

R719

47k

R715

100R

47k

R716

57uH / T131-8/90

L704

R731

10R

C725

1000u

C726

100n

C727

10n

C780

47u

C781

100n

C782

100n

C783

47u

connector4

J705

8k2

R698

R712

10k

3R3

R723

C721

220n

10k

R792

10k

R793

0R018

R729

0R018

R730

1 2

D710

R824

100R

5_pol_pow

J704

R827

4k7

100n

C784

GND

VCC

U703

J706

connector4

J707

connector4

3 1

10k

R826

POT

1 2 3

J703

R825

1k5

R757

10u

C754

10k

R756

R763

27k

PSU-PWM

+I-sense

-I-sense

0 0

+5VREF

0 0

+5VREF

RUN

TP-PSU

VIN-OV

+12V

TW-PSU

TP-PSU

VIN-OV

+V-sense

-I-sense

PSU-PWM

RUN

+VPWR

+I-sense

0 0

+5VREF

+VPWR

+V-sense

+5VREF

VOLUME

+12V

VIN

+12V

VIN

VIN-RTN

VIN

VIN-RTN

VIN

VIN-RTN

+12V

+5V

+12V

+5V

+12V

VOLUME

NONE

Texas Instruments Denmark A/S

2-40V max 12A

TBLK-A/B/C/G

DC/DC converter

A706-SCH-001

1.0

2004-05-23

REV

TITLE

SIZE

SCALE SHEET OF

DWG NO

VAO

CA-

VA-

CS+

CS-

VIN-NEG

VIN-POS

No.: 47

PSU Power stage

No.: 46

PSU Controler

No.: 44

Temperature detector for PSU

No.: 48

PSU Input voltage bleeder

Confidential

All rights belongs to

Texas Instruments

Inc.

No.: 49

PSU Input voltage filter

No.: 45

Remote sense, voltage control

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Texas Instruments Implementation of Power Supply Volume Control Application notes

Texas Instruments Implementation of Power Supply Volume Control Application notes

Texas Instruments Implementation of Power Supply Volume Control Application notes

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