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Rabbit 3000, 2000 Reference guide

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Rabbit 2000/3000Microprocessor
Instruction Reference Manual
019–0098 C • 020416
This manual (or an even more up-to-date revision) is available for free download
at the Rabbit website: www.rabbitsemiconductor.com
ii Rabbit 2000/3000 Microprocessor
Instruction Reference Manual iii
Table of Contents
1. AlphabeticalListingofInstructions.......................................1
2. InstructionsListedbyGroup ...........................................3
3. DocumentConventions ...............................................7
4. ProcessorRegisters.................................................11
5. OpCodeDescriptions................................................13
6. QuickReferenceTable..............................................111
iv Rabbit 2000 Microprocessor
Instruction Reference Manual 1
1. Alphabetical Listing of Instructions
A
ADC A,n ..............................14
ADC A,r ..............................14
ADC A,(HL) .........................13
ADC A,(IX+d) ......................13
ADC A,(IY+d) ......................13
ADC HL,ss ...........................15
ADD A,n ..............................16
ADD A,r ..............................16
ADD A,(HL) .........................15
ADD A,(IX+d) ......................15
ADD A,(IY+d) ......................15
ADD HL,ss ...........................17
ADD IX,xx ...........................18
ADD IY,yy ...........................18
ADD SP,d ............................18
ALTD ..................................19
AND HL,DE .........................21
AND IX,DE ..........................21
AND IY,DE ..........................21
AND n .................................22
AND r .................................22
AND (HL) ............................20
AND (IX+d) .........................20
AND (IY+d) .........................20
B
BIT b,r .................................24
BIT b,(HL) ...........................23
BIT b,(IX+d) .........................23
BIT b,(IY+d) .........................23
BOOL HL ............................24
BOOL IX .............................25
BOOL IY .............................25
C
CALL mn .............................25
CCF ....................................26
CP n ....................................27
CP r .....................................27
CP (HL) ...............................26
CP (IX+d) ............................26
CP (IY+d) ............................26
CPL .....................................28
D
DEC IX ................................29
DEC IY ................................29
DEC r ..................................29
DEC ss .................................30
DEC (HL) ............................28
DEC (IX+d) ..........................28
DEC (IY+d) ..........................28
DJNZ e ................................30
E
EX AF,AF' ...........................32
EX DE',HL ...........................32
EX DE,HL ............................32
EX (SP),HL ..........................31
EX (SP),IX ...........................31
EX (SP),IY ...........................31
EXX ....................................33
I
INC IX .................................34
INC IY .................................34
INC r ...................................34
INC ss .................................35
INC (HL) .............................33
INC (IX+d) ...........................33
INC (IY+d) ...........................33
IOE .....................................36
IOI ......................................36
IPRES ..................................38
IPSET 0 ...............................37
IPSET 1 ...............................37
IPSET 2 ...............................37
IPSET 3 ...............................37
J
JP f,mn ................................40
JP mn ..................................39
JP (HL) ................................39
JP (IX) .................................39
JP (IY) .................................39
JR cc,e .................................41
JR e .....................................41
L
LCALL x,mn ........................42
LD A,EIR .............................50
LD A,IIR ..............................50
LD A,XPC ............................50
LD A,(BC) ...........................49
LD A,(DE) ...........................49
LD A,(mn) ............................49
LD dd',BC ............................51
LD dd',DE ............................51
LD dd,mn .............................52
LD dd,(mn) ...........................51
LD EIR,A .............................52
LD HL,IX .............................54
LD HL,IY .............................54
LD HL,(HL+d) ......................53
LD HL,(IX+d) .......................53
LD HL,(IY+d) .......................53
LD HL,(mn) ..........................53
LD HL,(SP+n) .......................54
LD IIR,A ..............................52
LD IX,HL .............................56
LD IX,mn .............................56
LD IX,(mn) ..........................55
LD IX,(SP+n) .......................55
LD IY,HL .............................56
LD IY,mn .............................56
LD IY,(mn) ..........................56
LD IY,(SP+n) .......................57
LD r,g ..................................60
LD r,n ..................................59
LD r,(HL) .............................58
LD r,(IX+d) ..........................58
LD r,(IY+d) ..........................58
LD SP,HL ............................61
LD SP,IX .............................61
LD SP,IY .............................61
LD XPC,A ............................61
LD (BC),A ...........................43
LD (DE),A ...........................43
LD (HL),n ............................43
LD (HL),r .............................43
LD (HL+d),HL ......................44
LD (IX+d),HL .......................45
LD (IX+d),n ..........................45
LD (IX+d),r ..........................45
LD (IY+d),HL .......................46
LD (IY+d),n ..........................46
LD (IY+d),r ..........................46
LD (mn),A ............................47
2 Rabbit 2000/3000 Microprocessor
LD (mn),HL ..........................47
LD (mn),IX ...........................47
LD (mn),IY ...........................47
LD (mn),ss ...........................47
LD (SP+n),HL .......................48
LD (SP+n),IX ........................48
LD (SP+n),IY ........................48
LDD ....................................62
LDDR ..................................62
LDI .....................................62
LDIR ...................................62
LDP HL,(HL) ........................65
LDP HL,(IX) .........................65
LDP HL,(IY) .........................65
LDP HL,(mn) ........................66
LDP IX,(mn) .........................66
LDP IY,(mn) .........................66
LDP (HL),HL ........................63
LDP (IX),HL .........................63
LDP (IY),HL .........................63
LDP (mn),HL ........................64
LDP (mn),IX .........................64
LDP (mn),IY .........................64
LJP x,mn ..............................67
LRET ..................................67
M
MUL ...................................68
N
NEG ....................................69
NOP ....................................69
O
OR HL,DE ...........................71
OR IX,DE ............................71
OR IY,DE ............................71
OR n ....................................72
OR r ....................................72
OR (HL) ...............................70
OR (IX+d) ............................70
OR (IY+d) ............................70
P
POP IP .................................73
POP IX ................................73
POP IY ................................73
POP zz .................................74
PUSH IP ..............................75
PUSH IX ..............................75
PUSH IY ..............................75
PUSH zz ..............................76
R
RA ......................................89
RES b,r ................................78
RES b,(HL) ...........................77
RES b,(IX+d) ........................77
RES b,(IY+d) ........................77
RET ....................................79
RET f ..................................80
RETI ...................................81
RL DE .................................83
RL r ....................................83
RL (HL) ...............................82
RL (IX+d) ............................82
RL (IY+d) ............................82
RLA ....................................84
RLC r ..................................86
RLC (HL) .............................85
RLC (IX+d) ..........................85
RLC (IY+d) ..........................85
RLCA ..................................86
RR DE .................................88
RR HL .................................88
RR IX ..................................88
RR IY ..................................88
RR r ....................................89
RR (HL) ...............................87
RR (IX+d) ............................87
RR (IY+d) ............................87
RRC r ..................................91
RRC (HL) ............................90
RRC (IX+d) ..........................90
RRC (IY+d) ..........................90
RRCA ..................................91
RST v ..................................92
S
SBC A,n ...............................94
SBC A,r ...............................94
SBC A,(HL) ..........................93
SBC HL,ss ............................95
SBC (IX+d) ..........................93
SBC (IY+d) ..........................93
SCF .....................................95
SET b,r ................................97
SET b,(HL) ...........................96
SET b,(IX+d) ........................96
SET b,(IY+d) ........................96
SLA r ..................................99
SLA (HL) .............................98
SLA (IX+d) ..........................98
SLA (IY+d) ..........................98
SRA r ................................101
SRA (HL) ...........................100
SRA (IX+d) ........................100
SRA (IY+d) ........................100
SRL r .................................103
SRL (HL) ...........................102
SRL (IX+d) ........................102
SRL (IY+d) ........................102
SUB n ................................104
SUB r ................................105
SUB (HL) ...........................104
SUB (IX+d) ........................104
SUB (IY+d) ........................104
X
XOR n ...............................107
XOR r ................................107
XOR (HL) ..........................106
XOR (IX+d) .......................106
XOR (IY+d) .......................106
Instruction Reference Manual 3
2. Instructions Listed by Group
A. Load Immediate Data
LD dd,mn ...............................52
LD IX,mn ................................56
LD IY,mn ................................56
LD r,n ...................................59
B. Load and Store to an Immediate Address
LD (mn),A ...............................47
LD (mn),HL ..............................47
LD (mn),IX ..............................47
LD (mn),IY ..............................47
LD (mn),ss ..............................47
LD A,(mn) ...............................49
LD dd,(mn) ..............................51
LD HL,(mn) ..............................53
LD IX,(mn) ..............................55
LD IY,(mn) ..............................56
C. 8-bit Indexed Load and Store
LD (BC),A ...............................43
LD (DE),A ...............................43
LD (HL),n ...............................43
LD (HL),r ................................43
LD (IX+d),n ..............................45
LD (IX+d),r ..............................45
LD (IY+d),n ..............................46
LD (IY+d),r ..............................46
LD A,(BC) ...............................49
LD A,(DE) ...............................49
LD r,(HL) ................................58
LD r,(IX+d) ..............................58
LD r,(IY+d) ..............................58
D. 16-bit Indexed Load and Store
LD (HL+d),HL ............................44
LD (IX+d),HL ............................45
LD (IY+d),HL ............................46
LD (SP+n),HL ............................48
LD (SP+n),IX ............................48
LD (SP+n),IY ............................48
LD HL,(HL+d) ............................53
LD HL,(IX+d) ............................53
LD HL,(IY+d) ............................53
LD HL,(SP+n) ............................54
LD IX,(SP+n) .............................55
LD IY,(SP+n) .............................57
E. 16-bit Load and Store to 20-bit Address
LDP (HL),HL .............................63
LDP (IX),HL ..............................63
LDP (IY),HL ..............................63
LDP (mn),HL .............................64
LDP (mn),IX .............................64
LDP (mn),IY .............................64
LDP HL,(HL) .............................65
LDP HL,(IX) ..............................65
LDP HL,(IY) ..............................65
LDP HL,(mn) .............................66
LDP IX,(mn) .............................66
LDP IY,(mn) .............................66
F. Register to Register Moves
LD A,EIR ................................50
LD A,IIR .................................50
LD A,XPC ...............................50
LD dd’,BC ...............................51
LD dd’,DE ...............................51
LD EIR,A ................................52
LD HL,IX ................................54
LD HL,IY ................................54
LD IIR,A .................................52
LD IX,HL ................................56
LD IY,HL ................................56
LD r,g ...................................60
LD SP,HL ................................61
LD SP,IX ................................61
LD SP,IY ................................61
LD XPC,A ...............................61
G. Exchange
EX (SP),HL ..............................31
EX (SP),IX ...............................31
EX (SP),IY ...............................31
EX AF,AF’ ...............................32
EX DE,HL ...............................32
EX DE’,HL ...............................32
4 Rabbit 2000/3000 Microprocessor
EXX ....................................33
H. Stack Manipulation
POP IP ..................................73
POP IX ..................................73
POP IY ..................................73
POP zz .................................74
PUSH IP ................................75
PUSH IX ................................75
PUSH IY ................................75
PUSH zz ................................76
I. 16-bit Arithmetic, Logical, and Rotate
ADC HL,ss ..............................15
ADD HL,ss ..............................17
ADD IX,xx ...............................18
ADD IY,yy ...............................18
ADD SP,d ...............................18
AND HL,DE ..............................21
AND IX,DE ..............................21
AND IY,DE ..............................21
BOOL HL ................................24
BOOL IX ................................25
BOOL IY ................................25
DEC IX ..................................29
DEC IY ..................................29
DEC ss .................................30
INC IX ..................................34
INC IY ..................................34
INC ss ..................................35
MUL ....................................68
NEG ....................................69
OR HL,DE ...............................71
OR IX,DE ...............................71
OR IY,DE ...............................71
RL DE ..................................83
RR DE ..................................88
RR HL ..................................88
RR IX ...................................88
RR IY ...................................88
SBC HL,ss ..............................95
J. 8-bit Arithmetic and Logical
ADC A,(HL) .........................13
ADC A,(IX+d) .......................13
ADC A,(IY+d) .......................13
ADC A,n ................................ 14
ADC A,r ................................ 14
ADD A,(HL) ............................. 15
ADD A,(IX+d) ........................... 15
ADD A,(IY+d) ........................... 15
ADD A,n ................................ 16
ADD A,r ................................ 16
AND (HL) ............................... 20
AND (IX+d) ............................. 20
AND (IY+d) ............................. 20
AND r .................................. 22
CP (HL) ................................ 26
CP (IX+d) ............................... 26
CP (IY+d) ............................... 26
CP n ................................... 27
CP r .................................... 27
NEG ................................... 69
OR (HL) ................................ 70
OR (IX+d) ............................... 70
OR (IY+d) ............................... 70
OR n ................................... 72
OR r ................................... 72
SBC (IX+d) ............................. 93
SBC (IY+d) ............................. 93
SBC A,(HL) ............................. 93
SBC A,n ................................ 94
SBC A,r ................................ 94
SUB (HL) .............................. 104
SUB (IX+d) ............................ 104
SUB (IY+d) ............................ 104
SUB n ................................. 104
SUB r ................................. 105
XOR (HL) .............................. 106
XOR (IX+d) ............................ 106
XOR (IY+d) ............................ 106
XOR n ................................. 107
XOR r ................................. 107
K. 8-bit Bit Set, Reset, and Test
BIT b,(HL) .............................. 23
BIT b,(IX+d) ............................. 23
BIT b,(IY+d) ............................. 23
BIT b,r .................................. 24
RES b,(HL) ............................. 77
RES b,(IX+d) ............................ 77
RES b,(IY+d) ............................ 77
Instruction Reference Manual 5
RES b,r .................................78
SET b,(HL) ..............................96
SET b,(IX+d) ............................96
SET b,(IY+d) ............................96
SET b,r .................................97
L. 8-bit Increment and Decrement
DEC (HL) ...............................28
DEC (IX+d) ..............................28
DEC (IY+d) ..............................28
DEC r ...................................29
INC (HL) ................................33
INC (IX+d) ...............................33
INC (IY+d) ...............................33
INC r ...................................34
M. 8-bit Fast Accumulator
CPL ....................................28
RLA ....................................84
RLCA ...................................86
RRA ....................................89
RRCA ..................................91
N. 8-bit Shift and Rotate
RL (HL) .................................82
RL (IX+d) ...............................82
RL (IY+d) ...............................82
RLC (HL) ................................85
RLC (IX+d) ..............................85
RLC (IY+d) ..............................85
RLC r ...................................86
RR (HL) .................................87
RR (IX+d) ...............................87
RR (IY+d) ...............................87
RR r ....................................89
RRC (HL) ...............................90
RRC (IX+d) ..............................90
RRC (IY+d) ..............................90
RRC r ...................................91
SLA (HL) ................................98
SLA (IX+d) ..............................98
SLA (IY+d) ..............................98
SLA r ...................................99
SRA (HL) ...............................100
SRA (IX+d) .............................100
SRA (IY+d) .............................100
SRA r ..................................101
SRL (HL) ...............................102
SRL (IX+d) .............................102
SRL (IY+d) .............................102
SRL r ..................................103
O. Instruction Prefixes
ALTD ...................................19
IOE .....................................36
IOI ......................................36
P. Block Moves
LDD ....................................62
LDDR ...................................62
LDI .....................................62
LDIR ....................................62
Q. Control, Jump, and Call
CALL mn ................................25
DJNZ e ..................................30
JP (HL) ..................................39
JP (IX) ..................................39
JP (IY) ..................................39
JP f,mn ..................................40
JP mn ...................................39
JR cc,e ..................................41
JR e ....................................41
LCALL x,mn .............................42
LJP x,mn ................................67
LRET ...................................67
RET ....................................79
RET f ...................................80
RETI ....................................81
RST v ...................................92
R. Miscellaneous
CCF ....................................26
IPSET 0 .................................37
IPSET 1 .................................37
IPSET 2 .................................37
IPSET 3 .................................37
NOP ....................................69
SCF ....................................95
S. New Instructions
ADD SP,d ...............................18
6 Rabbit 2000/3000 Microprocessor
ALTD ...................................19
AND HL,DE ..............................21
AND IX,DE ..............................21
AND IY,DE ..............................21
BOOL HL ................................24
BOOL IX ................................25
BOOL IY ................................25
EX (SP),HL ..............................31
EX DE,HL ...............................32
IOE .....................................36
IOI ......................................36
IPRES ..................................38
IPSET 0 .................................37
IPSET 1 .................................37
IPSET 2 .................................37
IPSET 3 .................................37
LCALL x,mn .............................42
LD (HL+d),HL ............................44
LD (IX+d),HL .............................45
LD (IY+d),HL .............................46
LD (SP+n),HL ............................48
LD (SP+n),IX ............................48
LD (SP+n),IY ............................48
LD A,XPC ...............................50
LD dd’,BC ...............................51
LD dd’,DE ...............................51
LD HL,(HL+d) ............................53
LD HL,(IX+d) .............................53
LD HL,(IY+d) .............................53
LD HL,(SP+n) ............................54
LD HL,IX ................................54
LD HL,IY ................................54
LD IX,(SP+n) ............................55
LD IX,HL ................................56
LD IY,(SP+n) ............................57
LD IY,HL ................................56
LD XPC,A ...............................61
LDP (HL),HL .............................63
LDP (IX),HL .............................63
LDP (IY),HL .............................63
LDP (mn),HL .............................64
LDP (mn),IX .............................64
LDP (mn),IY .............................64
LDP HL,(HL) .............................65
LDP HL,(IX) .............................65
LDP HL,(IY) .............................65
LDP HL,(mn) ............................ 66
LDP IX,(mn) ............................. 66
LDP IY,(mn) ............................. 66
LJP x,mn ............................... 67
LRET ................................... 67
MUL ................................... 68
OR HL,DE .............................. 71
OR IX,DE ............................... 71
OR IY,DE ............................... 71
POP IP ................................. 73
PUSH IP ................................ 75
RETI ................................... 81
RL DE .................................. 83
RR DE ................................. 88
RR HL .................................. 88
RR IX .................................. 88
RR IY .................................. 88
T. Privileged Instructions
BIT b,(HL) .............................. 23
IPRES .................................. 38
IPSET 0 ................................ 37
IPSET 1 ................................ 37
IPSET 2 ................................ 37
IPSET 3 ................................ 37
LD A,XPC ............................... 50
LD SP,HL ............................... 61
LD SP,IX ............................... 61
LD SP,IY ............................... 61
LD XPC,A ............................... 61
POP IP ................................. 73
RETI ................................... 81
Instruction Reference Manual 7
3. Document Conventions
Instruction Table Key
• Opcode: A hexidecimal representation of the value that the mnemonic instruction represents.
• Instruction: The mnemonic syntax of the instruction.
• Clocks: The number of clock cycles it takes to complete this instruction. The numbers in parenthesis
are a breakdown of the total clocks. The number of clocks instructions take follows a general patern.
There are several Rabbit instructions that do not adhere to this pattern. Some instructions take more
clocks and some have been enhanced to take fewer clocks.
Table 1: Clocks Breakdown
• Operation: A symbolic representation of the operation performed.
Process Clocks
Each byte of the opcode. 2
Each data byte read. 2
Write to memory or exteral IO. 3
Write to internal IO. 2
Internal operation or computation. 1
8 Rabbit 2000/3000 Microprocessor
ALTD, I/O and Flags Table Keys
Table 2: ALTD (“A” Column) Symbol Key
Table 3: IOI and IOE (“I” Column) Symbol Key
Table 4: Flag Register Key
Flag
Description
F R SP
•
ALTD selects alternate flags
•
ALTD selects alternate destination register
•
ALTD operation is a special case
Flag
Description
SD
•
IOI and IOE affect destination
•
IOI and IOE affect source
S Z L/V C Description
•
Sign flag affected
-
Sign flag not affected
•
Zero flag affected
-
Zero flag not affected
L
LV flag contains logical check result
V
LV flag set on arithmetic overflow result
0
LV flag is cleared
•
LV flag is affected
•
Carry flag is affected
-
Carry flag is not affected
0
Carry flag is cleared
1
Carry flag is set
Instruction Reference Manual 9
Document Symbols Key
Table 5: Sym bols
Rabbit Z180 Meaning
b b Bit select (000 = bit 0, 001 = bit 1, 010 = bit 2, 011 = bit
3, 100 = bit 4, 101 = bit 5, 110 = bit 6, 111 = bit 7)
cc cc Condition code select (00 = NZ, 01 = Z, 10 = NC, 11 = C)
d d 7-bit (signed) displacement. Expressed in two's complement.
dd ww word register select-destination (00 = BC, 01 = DE, 10 =
HL, 11 = SP)
dd' word register select-alternate(00 = BC', 01 = DE', 10 =
HL')
e j 8-bit (signed) displacement added to PC
f f condition code select (000 = NZ, 001 = Z, 010 = NC, 011 = C,
100 = LZ/NV, 101 = LO/V, 110 = P, 111 = M)
m m the most significant bits(MSB) of a 16-bit constant
mn mn 16-bit constant
n n 8-bit constant or the least significant bits(LSB) of a 16-
bit constant
r, g g, g' byte register select (000 = B, 001 = C, 010 = D, 011 = E,
100 = H, 101 = L, 111 = A)
ss ww word register select-source ( 00 = BC, 01 = DE, 10 = HL, 11
= SP)
v v Restart address select ( 010 = 0020h, 011 = 0030h, 100 =
0040h, 101 = 0050h, 111 = 0070h)
x nbr an 8-bit constant to load into the XPC
xx xx word register select ( 00 = BC, 01 = DE, 10 = IX, 11 = SP)
yy yy word register select (00 = BC, 01 = DE, 10 = IY, 11 = SP)
zz zz word register select (00 = BC, 01 = DE, 10 = HL, 11 = AF)
10 Rabbit 2000/3000 Microprocessor
Condition Codes
Table 6: Condition Code Description
Condition Flag=Value Description
NZ Z=0 Not Zer0
Z Z=1 Zero
NC C=0 No Carry (C=0)
C C=1 Carry (C=1)
P S=0 Minus
M S=1 Positive
LZ L/V=0 For logic operations, Logic Zero
(all of the four most significant
bits of the result are zero)
NV L/V=0 For arithmentic operations,
No Overflow
LO L/V=1 For logic operations, Logic One
(one or more of the four most signif-
icant bits of the result are one)
V L/V=1 For arithmentic operations,
Overflow
Instruction Reference Manual 11
4. Processor Registers
SZ
LV
C
Sign Zero
Logical/
Overflow
Carry
IX
IY
SP
PC
Index Register
Index Register
Stack Pointer
Program Counter
General Purpose
External
Interrupt
Internal
Interrupt
Interrupt
Priority
Extension of
Program Counter
EIR
IIR
IP
XPC
Accumulator Flags
H
D
B
A F
L
E
C
16-bit Accumulator
Accumulator
Flags
D'
B'
A' F'
E'
C'
H' L'
16-bit Accumulator
Alternate Registers
12 Rabbit 2000/3000 Microprocessor
Instruction Reference Manual 13
5. OpCode Descriptions
Description
ThedataintheAccumulatorissummedwiththeCarryFlagandwiththedatainmemorywhoselocationis:
• heldinwordregisterHL, or
• the sum of the data in index register IX and a displacement value d,or
• the sum of the data in index register IY and a displacement value d.
The result is then stored in the Accumulator.
ADC A,(HL)
ADC A,(IX+d)
ADC A,(IY+d)
Opcode Instruction Clocks Operation
8E ADC A,(HL) 5 (2,1,2) A= A + (HL) + CF
DD 8E d ADC A,(IX+d) 9 (2,2,2,1,2) A= A + (IX+d)+CF
FD 8E d ADC A,(IY+d) 9 (2,2,2,1,2) A= A + (IY+d)+CF
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • • •
14 Rabbit 2000/3000 Microprocessor
Description
The 8-bit constant n is summed with the Carry Flag and with the data in the Accumulator. The sum is then
stored in the Accumulator.
Description
The data in the Accumulator is summed with the Carry Flag, CF, and with the data in register r (any of the
registersA,B,C,D,E,H,orL).TheresultisstoredintheAccumulator.
ADC A,n
Opcode Instruction Clocks Operation
CE n ADC A,n 4 (2,2) A=A+n +CF
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • •
ADC A,r
Opcode Instruction Clocks Operation
—— ADC A,r 2 A=A+r +CF
8F ADC A,A 2 A=A+A+CF
88 ADC A,B 2 A=A+B+CF
89 ADC A,C 2 A=A+C+CF
8A ADC A,D 2 A=A+D+CF
8B ADC A,E 2 A=A+E+CF
8C ADC A,H 2 A=A+H+CF
8D ADC A,L 2 A=A+L+CF
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • •
Instruction Reference Manual 15
Description
ThedataintheregisterpairHLissummedwiththeCarryFlagandwiththedatainwordregisterss (any of
the word registers BC, DE, HL, or SP). The result is stored in HL.
Description
The data in the Accumulator is summed with the data in the memory location whose address is:
• heldinwordregisterHL, or
• the sum of the data in index register IX and a displacement value d,or
• the sum of the data in index register IY and a displacement value d.
The result is stored in the Accumulator.
ADC HL,ss
Opcode Instruction Clocks Operation
—— ADC HL,ss 4 (2,2) HL = HL + ss +CF
ED 4A ADC HL,BC 4 (2,2) HL = HL + BC + CF
ED 5A ADC HL,DE 4 (2,2) HL = HL + DE + CF
ED 6A ADC HL,HL 4 (2,2) HL = HL + HL + CF
ED 7A ADC HL,SP 4 (2,2) HL = HL + SP + CF
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • •
ADD A,(HL)
ADD A,(IX+d)
ADD A,(IY+d)
Opcode Instruction Clocks Operation
86 ADD A,(HL) 5 (2,1,2) A = A + (HL)
DD 86 d ADD A,(IX+d) 9 (2,2,2,1,2) A = A + (IX+d)
FD 86 d ADD A,(IY+d) 9 (2,2,2,1,2) A = A + (IY+d)
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • • •
16 Rabbit 2000/3000 Microprocessor
Description
The data in the Accumulator is summed with the 8-bit constant n. The result is stored in the Accumulator.
Description
The data in the Accumulator is summed with the data in register r (any of the registers A, B, C, D, E, H, or L).
The result is stored in the Accumulator.
ADD A,n
Opcode Instruction Clocks Operation
C6 n ADD A,n 4 (2,2) A=A+n
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • •
ADD A,r
Opcode Instruction Clocks Operation
—— ADD A,r 2 A=A+r
87 ADD A,A 2 A=A+A
80 ADD A,B 2 A=A+B
81 ADD A,C 2 A=A+C
82 ADD A,D 2 A=A+D
83 ADD A,E 2 A=A+E
84 ADD A,H 2 A=A+H
85 ADD A,L 2 A=A+L
Flags ALTD I/O
S Z L/V C F R SP S D
• • V • • •
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