Delta Tau Acc-75 Owner's manual

Brand: Delta Tau

Model: Acc-75

Type: Owner's manual

Hardware Setup 1

^1 USER MANUAL

1^ USER MANUAL

^2 Accessory 75

Preliminary Documentation

^3 I/O Interface to PMAC and PMAC2

^4 3A0-603771-xUxx

^5 May 5, 2004

Single Source Machine Control Power // Flexibility // Ease of Use

21314 Lassen Street Chatsworth, CA 91311 // Tel. (818) 998-2095 Fax. (818) 998-7807 // www.deltatau.com

This document is furnished for the customers of Delta Tau Data Systems, Inc. Other uses are

unauthorized without written permission of Delta Tau Data Systems, Inc. Information contained in

this manual may be updated from time-to-time due to product improvements, etc., and may not

conform in every respect to former issues.

To report errors or inconsistencies, call or email:

Delta Tau Data Systems, Inc. Technical Support

Phone: (818) 717-5656

Fax: (818) 998-7807

Email: support@deltatau.com

Website: http://www.deltatau.com

Operating Conditions

All Delta Tau Data Systems, Inc. motion controller products, accessories, and amplifiers contain

static sensitive components that can be damaged by incorrect handling. When installing or handling

Delta Tau Data Systems, Inc. products, avoid contact with highly insulated materials. Only

qualified personnel should be allowed to handle this equipment.

In the case of industrial applications, we expect our products to be protected from hazardous or

conductive materials and/or environments that could cause harm to the controller by damaging

components or causing electrical shorts. When our products are used in an industrial environment,

install them into an industrial electrical cabinet or industrial PC to protect them from excessive or

corrosive moisture, abnormal ambient temperatures, and conductive materials. If Delta Tau Data

Systems, Inc. products are directly exposed to hazardous or conductive materials and/or

environments, we cannot guarantee their operation.

Dispose in accordance with applicable regulations.

Accessory 75 
Table of Contents  i 
Table of Contents 
INTRODUCTION ....................................................................................................................................................... 1 
Parity Checking ......................................................................................................................................................... 1 
Port Headers .............................................................................................................................................................. 2 
Reference Documents................................................................................................................................................ 2 
Hardware ................................................................................................................................................................... 2 
Quick Setup Guide .................................................................................................................................................... 3 
Acc-75 LED indicators ......................................................................................................................................... 3 
Internal Jumpers ................................................................................................................................................... 3 
SNAP I/O MODULES ................................................................................................................................................. 4 
I/O Map Inputs ...................................................................................................................................................... 4 
I/O Map Outputs ................................................................................................................................................... 6 
MULTIPLEX ADDRESS MAP ................................................................................................................................. 7 
JTHW Address Control (DIP Switch Setting, SW1) ................................................................................................. 7 
M-VARIABLE ASSIGNMENTS ............................................................................................................................... 8 
PROCESSING ACC-75 INPUTS AND OUTPUTS ............................................................................................... 10 
When to Access Acc-75 .......................................................................................................................................... 10 
Software .................................................................................................................................................................. 10 
Development Tools ............................................................................................................................................. 10 
Quick Start .......................................................................................................................................................... 10 
Map the I/O Points to PMAC M-Variables ............................................................................................................. 11 
Things to Know ................................................................................................................................................... 11 
ACC-75 SETUP ......................................................................................................................................................... 12 
Image Word Variables............................................................................................................................................. 12 
PMAC Location of Image Words............................................................................................................................ 12 
Open Memory — Standard PMAC ..................................................................................................................... 12 
DPRAM — Standard PMAC ............................................................................................................................... 12 
Turbo PMAC Location of Image Words ................................................................................................................. 12 
Open Memory Turbo PMAC ............................................................................................................................... 12 
DPRAM Standard Turbo PMAC ......................................................................................................................... 13 
Preventing Conflicts in Output Image Words ......................................................................................................... 13 
Image Words ........................................................................................................................................................... 15 
Individual Pieces of Image Words .......................................................................................................................... 15 
PMAC Memory Locations .................................................................................................................................. 15 
PMAC Dual-Ported RAM Locations .................................................................................................................. 16 
USING ACC-75 WITH MACRO STATION .......................................................................................................... 18 
MS{anynode},MI90:  Multiplexer Port #1 Read Address ................................................................................... 18 
MS{anynode},MI91:  Multiplexer Port #1 Read Value ...................................................................................... 19 
MS{anynode},MI92:  Multiplexer Port #1 Write Address .................................................................................. 19 
MS{anynode},MI93:  Multiplexer Port #1 Write Value ...................................................................................... 19 
MS{anynode},MI94:  Multiplexer Port #2 Read Address ................................................................................... 19 
MS{anynode},MI95:  Multiplexer Port #2 Read Value ...................................................................................... 19 
MS{anynode},MI96:  Multiplexer Port #2 Write Address .................................................................................. 19 
MS{anynode},MI97:  Multiplexer Port #1 Write Value ...................................................................................... 20 
CONNECTOR PINOUTS......................................................................................................................................... 22 
J1 and J2 (26-Pin Header) ................................................................................................................................. 22 
COMPONENT INSTALLATION ........................................................................................................................... 24 
Standard Panel Mounting ........................................................................................................................................ 24 
Preferred Method:  Template ............................................................................................................................. 24 
Alternate Method:  Prefabrication of Panels ...................................................................................................... 24 

    Accessory 75 
ii  Table of Contents 
Extrusion Installation onto Panel............................................................................................................................. 26 
DIN Rail Clip Installation onto Extrusion ............................................................................................................... 26 
Extrusion and DIN Rail Clip Assembly Installation onto DIN Rail ........................................................................ 27 
Remove Extrusion and DIN Rail Clip Assembly .................................................................................................... 27 
Method 1 ............................................................................................................................................................. 27 
Method 2 ............................................................................................................................................................. 28 
ID Plate Installation onto Extrusion ........................................................................................................................ 28 
Install the ID Plate on the Extrusion .................................................................................................................. 28 
Remove ID Plate ................................................................................................................................................. 28 
Circuit Board Assembly .......................................................................................................................................... 29 
Install PC Board into Rack Extrusion ................................................................................................................ 29 
Remove PC Board from Rack Extrusion ............................................................................................................. 29 
Module Assembly ................................................................................................................................................... 30 
Install Modules onto Circuit Board .................................................................................................................... 30 
Remove Modules from Circuit Board ................................................................................................................. 31 
SNAP Module Jumper Straps .................................................................................................................................. 32 
PREVENTING CONFLICTS .................................................................................................................................. 34 
APPENDIX A — SNAP I/O BACKPLANE ............................................................................................................ 36 
SNAP-D64RS Rack ................................................................................................................................................ 36 
Specifications for All Models .............................................................................................................................. 36 
Operating Requirements ..................................................................................................................................... 36 
Dimensional Drawings for All Models ............................................................................................................... 37 
Mounting ................................................................................................................................................................. 38 
Preferred Method:  Template ............................................................................................................................. 38 
Alternate Method:  Prefabrication of Panels ...................................................................................................... 38 
 
 

Accessory 75

Introduction 1

INTRODUCTION

PMAC’s Accessory 75 is a brain module that plugs into the OPTO SNAP I/O rack (D64RS) in place of

the OPTO 22-brain module. This I/O accessory connects the PMAC1 or PMAC2 JTHW Port to the

industry standard OPTO22 SNAP Family of I/O racks. Each rack provides 32in/32out digital I/O fixed

per each interface module. One Acc-75 is required for each rack.

A 3 foot cable is included to connect between PMAC’s JTHW port and the Acc-75 (IDC connectors).

This module plugs into the OPTO22 SNAP-D64RS rack and is compatible with all SNAP Digital I/O

Modules.

Acc-75 is one of a series of I/O accessories for PMAC that connects to the OPTO SNAP I/O. Others are:

Acc-76

The 64-bit SNAP I/O Interface board, DB25 connector

Acc-77

The 64-bit SNAP Inputs Interface board

All of the above accessories use the JTHW multiplex address scheme, and several of them may be daisy-

chained to a single PMAC.

Up to 32 Acc-75 may be connected to a single PMAC, which gives a possible 1024 input and 1024 output

lines in addition to those available on the PMAC board and on the parallel I/O expansion boards (Acc-

14). Acc-75 communicates to PMAC via its JTHW connector through the supplied flat cable.

Acc-75 also supports a local watchdog timer feature independent of PMAC’s.

 Individual optical isolation of all I/O points

 RC filter with 1 msec time constant on all inputs

 Parity checking on serial communications with PMAC

 Two multiplexer port headers for easier daisychaining

Parity Checking

Parity checking is done on all serial communications between the PMAC and the Acc-75. This requires

PMAC firmware version 1.16 or newer.

When PMAC sends data to the Acc-75 32-bit output word by writing to the TWS M-variable pointing to

that word, the Acc-75 evaluates the parity bits sent with that word and compares them to the parity bits it

calculated itself. If there is a difference, the output word is ignored (the outputs stay in the state of the

last successful write), and PMAC is notified of a parity error. PMAC shows this error by setting bit 6 of

the global status register X:$0003 (X:$000006 in Turbo PMAC). The user program can check this bit

with an M-variable to see if the data must be sent again.

When the Acc-75 sends the 32-input word to PMAC, PMAC reads the TWS M-variable pointing to that

word, the Acc-75 creates parity bits that are sent with the word. PMAC evaluates the parity bits sent with

that word and compares them to the parity bits it calculated itself. If there is a difference, PMAC shows

the error by setting this parity error bit. The user program can check this bit with an M-variable to see if

the data must be sent again.

Accessory 75

2 Introduction

Port Headers

The Acc-75 has two 26-pin IDC headers (male), J1 and J2, that can be used for connection of boards to

the PMAC JTHW Multiplexer port. The identical signals are present on both connectors with a simple

pass-through on the board, so it is possible to use the second header to connect to the next accessory

board daisychained to the multiplexer port, instead of a multi-drop cable.

Reference Documents

Have the following reference documentation available:

Non Turbo

 PMAC User Manual and Software Reference Manual

 PMAC Hardware Reference Manual (use the Hardware reference of the board that you are using)

Turbo

 Turbo Users manual and Software Reference Manual

 Turbo PMAC/UMAC/QMAC Hardware reference Manual (use the Hardware reference of the board

that is being used)

 Opto22’s SNAP I/O Reference Manuals

Hardware

The following checklist provides a quick start for hardware installation. Refer to the appropriate PMAC

Hardware Reference manual and the appropriate Opto22 Snap I/O Hardware manual for more detailed

information.

 Install the backplane-mounting track on the panel.

 Install the Opto22 backplane in the track.

 Connect 5Vdc/0Vdc(Digital GND)/P.E. to the terminal block on the Opto22 rack.

 Set the address switches on Acc-75 (SW1).

 Install Acc-75 on the backplane.

 Install the Input Modules in slots 0 thru 7.

 Install the Output Modules in slots 8 thru 15.

 Connect one end of the 26-conductor ribbon cable provided to Acc-75 (J1).

 Connect one end of the 26-conductor ribbon cable provided to PMAC’s JTHW port.

 Connect the field wiring to each I/O module as required.

The following interconnection diagram illustrates the connection of multiple Acc-75s to a PMAC. Up to

32 can be daisy chained to a single PMAC for a total of 1024 inputs and 1024 outputs. The location of

the JTHW interface connector on PMAC varies, depending on which PMAC is used. Refer to the

appropriate PMAC Hardware Reference manual to confirm the location and designation of the JTHW

port on the PMAC.

PMAC

PBra in32

26c Ribbon Cable

Interconnection

Diagram

I I I I I I I OOOOOOO

PBra in32

I I I I I I I OOOOOOO

to additional I/O if required

Accessory 75

Introduction 1

Quick Setup Guide

Use the following procedure to begin the process of integrating Acc-75 into the application:

1. Remove all Power from the system.

2. Install the SNAP I/O and Acc-75 Interface.

3. Install the interconnecting cabling.

4. Set the Address of the Acc-75 interface to Board #1.

5. Disable all motors, drives, hydraulics or other devices that can cause motion.

6. Connect a PC to the PMAC either serially or via a bus connection.

7. Apply power to the PMAC and to the SNAP I/O rack.

8. Set I5=0 to disable all PLC programs.

9. Verify that Firmware version 1.16x or later is used. (Enter ver in the terminal window.)

10. There should be two green LEDs and one red LED illuminated on Acc-75.

11. Back-up the existing PMAC Setup and Programs.

12. Verify the back up.

13. Set up the Acc-75, we suggest to use the manual and the examples that follow

14. Acc-75 implements watchdog circuitry that turns all outputs OFF if PMAC fails to communicate to

Acc-75 for more than one second. This feature can be disabled by installing a jumper in Acc-75 but it

is not recommended.

The integration of the I/O into the application can begin.

Acc-75 LED indicators

LED

Description

+5Vdc (On the Left)

This Green LED indicates the presence of 5Vdc from PMAC. Acc-75

provides optical isolation between PMAC and the logic side of the Opto22

SNAP modules. The 5V required for the PMAC side of the interface is

present on the 26-conductor ribbon cable connected to the JTHW port of

PMAC (Board #1).

+5Vdc (On the Right)

This Green LED indicates the presence of 5Vdc from the Opto22

backplane. The system will not work without this connected.

5Vdc must be supplied to this terminal strip to power the logic side of the

SNAP I/O modules (Board #2).

Watchdog (On the Right)

The Red/WD LED is illuminated if the watchdog is tripped (Board #2).

Acc-75 incorporates a watchdog circuit that turns the outputs off if

communication with PMAC is lost for more that one second. Installing

jumper E9, in Acc-75 can disable this feature, but it is not recommended.

Internal Jumpers

E Point

Default

Description

Connects Acc-75 data to PMAC DAT0 Line

OFF

Connects Acc-75 data to PMAC DAT1 Line

OFF

Connects Acc-75 data to PMAC DAT2 Line

OFF

Connects Acc-75 data to PMAC DAT3 Line

OFF

Connects Acc-75 data to PMAC DAT4 Line

OFF

Connects Acc-75 data to PMAC DAT5 Line

OFF

Connects Acc-75 data to PMAC DAT6 Line

OFF

Connects Acc-75 data to PMAC DAT7 Line

OFF

Install to disable Acc-75 watchdog circuitry

Note: Only one of the jumpers E1 thru E8 should be installed.

The OEM should never have to adjust the E-point jumpers from their factory default settings.

All the jumpers are on Board #1, P/N 603771-10x

Accessory 75

4 Snap I/O Modules

SNAP I/O MODULES

Field wiring is connected to the terminals of the Opto22 SNAP I/O modules. The purpose of the SNAP

module is to isolate real world signals from PMAC. The isolation is achieved by using optical isolation

components in the SNAP module to separate PMAC’s ground from the I/O ground. In addition, the

SNAP modules provide the opportunity to condition the I/O signals. Typical I/O devices operate a 24Vdc

or 120VAC, which is incompatible with PMAC, as well as most other electronic devices operating at

5Vdc. A wide variety of SNAP modules is available to accommodate different I/O characteristics. Each

SNAP I/O module regardless of its output characteristics, conditions the I/O to a 5Vdc signal. These

5Vdc signals are communicated along the backplane to Acc-75.

Acc-75 interacts with the 5Vdc signals communicated along the backplane from the SNAP I/O modules

and communicates them to a PMAC. Since many need to connect more I/O to PMAC than there are I/O

lines on PMAC, a multiplexed I/O interface using the JTHW port of PMAC was developed by Delta Tau

called the Acc-34 family of I/O devices. Acc-75 emulates an Acc-34AA device.

The original use of the JTHW interface was to multiplex thumb-wheel switch data into PMAC using

address lines and an 8-bit data bus. A serial communication method was developed for this interface to

allow more I/O to be interfaced to PMAC. The TWS data format is used in PMAC programs to acquire

this serial thumb-wheel data. Refer to the PMAC Software Reference for more details on this format and

its usage.

Acc-75 implements the circuitry to do the serial to parallel and parallel to serial data conversion required

by the interface. In addition, Acc-75 implements error detection in the form of parity around the data

packets communicated to PMAC.

The JTHW connector provides the 5Vdc, powering the interface electronics providing optical isolation

between PMAC and Acc-75. The PMAC TWS serial data format must be used to access the Pendant One

Option 2 I/O.

Note:

Error detection was added to the serial data frames transmitted by the interface

hardware in Version 1.16 of the PMAC firmware. If the PROM version is not

version 1.16 or later, obtain an update.

I/O Map Inputs

Acc-75 adds a parity bit to the outgoing data. PMAC accepts the new input data and sets a bit in its

global status word indicating a parity error if there is one. The user (programmer) decides if utilizing this

information is important. This bit should be evaluated after each read from Acc-75. If a parity error

exists, the software should ignore the current input data and re-read the input until no parity exists. If

good input data is not received within a certain time or after a number of tries, a global fault flag should

be set indicating the existence of a fatal communication fault. An example of this technique is given in

the Software section of this manual.

Accessory 75

Snap I/O Modules 5

The following table summarizes the mapping of the inputs from the SNAP modules to Acc-75:

Acc-75

Input Bit

Opto-22

SNAP

Backplane

Slot #

SNAP

Module

Channel

Name

Usage

In00

General purpose input

In01

General purpose input

In02

General purpose input

In03

General purpose input

In04

General purpose input

In05

General purpose input

In06

General purpose input

In07

General purpose input

In08

General purpose input

In09

General purpose input

In10

General purpose input

In11

General purpose input

In12

General purpose input

In13

General purpose input

In14

General purpose input

In15

General purpose input

In16

General purpose input

In17

General purpose input

In18

General purpose input

In19

General purpose input

In20

General purpose input

In21

General purpose input

In22

General purpose input

In23

General purpose input

In24

General purpose input

In25

General purpose input

In26

General purpose input

In27

General purpose input

In28

General purpose input

In29

General purpose input

In30

General purpose input

In31

General purpose input

Accessory 75

6 Snap I/O Modules

I/O Map Outputs

The TWS format reads inputs and writes outputs in blocks of 32 bits per read or write. The Acc-75

hardware calculates an additional bit (parity) and checks it against incoming data streams and adds it to

outgoing data streams. This action is transparent. If the incoming data’s parity bit does not match the

calculated parity, the SNAP I/O outputs are not changed. When the Acc-75 receives an incoming data

stream and a matching parity bit, the SNAP I/O outputs are changed to match the new data.

The following table summarizes the mapping of the outputs of the SNAP modules to Acc-75:

Acc-75

Output

Bit

Opto-22

SNAP

Backplane

Slot #

SNAP

Module

Channel

Name

Usage

Out 00

General purpose output

Out 01

General purpose output

Out 02

General purpose output

Out 03

General purpose output

Out 04

General purpose output

Out 05

General purpose output

Out 06

General purpose output

Out 07

General purpose output

Out 08

General purpose output

Out 09

General purpose output

Out 10

General purpose output

Out 11

General purpose output

Out 12

General purpose output

Out 13

General purpose output

Out 14

General purpose output

Out 15

General purpose output

Out 16

General purpose output

Out 17

General purpose output

Out 18

General purpose output

Out 19

General purpose output

Out 20

General purpose output

Out 21

General purpose output

Out 22

General purpose output

Out 23

General purpose output

Out 24

General purpose output

Out 25

General purpose output

Out 26

General purpose output

Out 27

General purpose output

Out 28

General purpose output

Out 29

General purpose output

Out 30

General purpose output

Out 31

General purpose output

Accessory 75

Multiplex Address Map 7

MULTIPLEX ADDRESS MAP

Each ACC-75 occupies eight bytes of address space on the PMAC’s JTHW multiplex memory space.

This memory space is 8-bits wide, which provides the ability to daisy chain 32 (256/8) Acc-34XS

together (or a combination of Acc-75/76/77, Acc-34XS, Acc-18s and Acc-8D Option 7s). The 5-bit DIP-

switch, SW1, determines the address of each ACC-75 board on the allocated memory space. Port A

occupies the base address (i.e. bytes 0, 8, 16 etc.) and Port B occupies the base address plus 4 (i.e. bytes 4,

12, 20 etc.). The following table shows how SW1should be set for one or more Acc-75 boards connected

to the same PMAC.

JTHW Address Control (DIP Switch Setting, SW1)

Each I/O device connected to the JTHW port must be setup at a specific base address. The following

table (table 1) gives the valid switch settings and the corresponding M-Variable setup:

Board

Byte (Port A

and Port B)

SW1 Dip Switch

Inputs

Outputs

0 & 4

Mxxx->TWS:1

Mxxx->TWS:6

8 & 12

OFF

Mxxx->TWS:9

Mxxx->TWS:14

16 & 20

OFF

Mxxx->TWS:17

Mxxx->TWS:22

24 & 28

OFF

Mxxx->TWS:25

Mxxx->TWS:30

32 & 36

OFF

Mxxx->TWS:33

Mxxx->TWS:38

40 & 44

OFF

Mxxx->TWS:41

Mxxx->TWS:46

48 & 52

OFF

Mxxx->TWS:49

Mxxx->TWS:54

56 & 60

OFF

Mxxx->TWS:57

Mxxx->TWS:62

64 &68

OFF

Mxxx->TWS:65

Mxxx->TWS:70

72 & 76

OFF

Mxxx->TWS:73

Mxxx->TWS:78

80 & 84

OFF

Mxxx->TWS:81

Mxxx->TWS:86

88 &92

OFF

Mxxx->TWS:89

Mxxx->TWS:94

96 & 100

OFF

Mxxx->TWS:97

Mxxx->TWS:102

104 & 108

OFF

Mxxx->TWS:105

Mxxx->TWS:110

112 & 116

OFF

Mxxx->TWS:113

Mxxx->TWS:118

120 & 124

OFF

Mxxx->TWS:121

Mxxx->TWS:126

128 & 132

OFF

Mxxx->TWS:129

Mxxx->TWS:134

136 & 140

OFF

Mxxx->TWS:137

Mxxx->TWS:142

144 & 148

OFF

Mxxx->TWS:145

Mxxx->TWS:150

152 & 156

OFF

Mxxx->TWS:153

Mxxx->TWS:158

160 & 164

OFF

Mxxx->TWS:161

Mxxx->TWS:166

168 & 172

OFF

Mxxx->TWS:169

Mxxx->TWS:174

176 & 180

OFF

Mxxx->TWS:177

Mxxx->TWS:182

184 &188

OFF

Mxxx->TWS:185

Mxxx->TWS:190

192 & 196

OFF

Mxxx->TWS:193

Mxxx->TWS:198

200 & 204

OFF

Mxxx->TWS:201

Mxxx->TWS:206

208 & 212

OFF

Mxxx->TWS:209

Mxxx->TWS:214

216 & 220

OFF

Mxxx->TWS:217

Mxxx->TWS:222

124 & 228

OFF

Mxxx->TWS:225

Mxxx->TWS:230

232 & 236

OFF

Mxxx->TWS:233

Mxxx->TWS:238

240 & 244

OFF

Mxxx->TWS:241

Mxxx->TWS:246

248 & 252

OFF

Mxxx->TWS:249

Mxxx->TWS:250

This table shows the daisy-chain board address relationship with respect to the 5-bit (SW1) DIP Switch setting.

Note: ON=CLOSED, OFF=OPEN. To turn "off" a switch, push down on the "open" side. To turn "on" a

switch, push down on the "numbered" side.

Accessory 75

8 M-Variable Assignments

M-VARIABLE ASSIGNMENTS

TWS is a special format 32-bit wide M-variable for reading the data from, and writing the data to an Acc-

34 card:

M{constant}->TWS:{m-plex} ;Serial Thumbwheel Multiplexer M-Variable

;Definition

This command causes PMAC to define the specified M-variable or range of M-variables to point to a 32-

bit word of input or output serially multiplexed on the thumbwheel port on an Acc-75 board.

Note:

The individual bits of the "thumbwheel" port on an Accessory 75 board can not be

directly assigned to an M-variable. Only 32-bit words (ports) of input or output

can be accessed.

The address on the multiplex port specified here must match the address set by the DIP switch on the

Acc-75 board. The Acc-75 manual contains a table listing all of the possibilities.

The entire word must either be all input or all output. On power-up/reset, all Acc-75 words are software-

configured as inputs (if the hardware is configured for outputs, all outputs will be OFF – pulled up to the

supply voltage). Any subsequent write operation to an I/O word on the port with one of these M-

variables automatically makes the entire word an output word with individual bits ON or OFF, as

determined by the value written to the word.

Any subsequent read operation of a word that has been set up for output configures, or tries to configure,

the entire word into an input word, which turns any hardware outputs OFF. Therefore, it is important that

the following rules be observed when working with these M-variables:

 Never use this M-variable form to write to a word that is set up for inputs.

 Never use this M-variable form to read from a word that is set up for outputs

The best procedure for using TWS M-variables in a program is as follows: The input word (TWS M-

variable) should be copied into its image variable at the beginning of a sequence of operations. The

operations can then be done on the image variable without requiring PMAC to actually read or write to

the I/O port for each operation. The output word is first "assembled" into its image variable, and then

copied to the actual output word once at the end of a sequence of operations. This procedure will allow

the most efficient and flexible use of TWS M-variables.

Note:

This type of variable can only be used in background tasks (PLCs and PLCCs 1-

31). They cannot be used in foreground tasks (motion programs and PLC and

PLCC 0).

For an input port, {m-plex} is a legal byte number (from column 2 of Table 1) plus 1. Any attempt to

write to a TWS type M-variable defined with bit zero of its address set to 1, is automatically prevented by

PMAC's firmware. For an output port, {m-plex} is a legal byte number (from column 2 of Table 1) plus

2. An attempt to read a TWS type M-variable defined with bit one of its address set to 1, returns zero,

and the actual read is prevented by PMAC's firmware.

Note:

Individual bits cannot be directly assigned to an M-variable of this type. Rather,

banks of 32 bits (ports) can be assigned to M-variables.

Accessory 75

M-Variable Assignments 9

Example: To address Port A (bits 0 to 31) of board #1 as an input using M100, use the following

definition:

Board #

Byte (Port A and Port B)

0 and 4

M100->TWS:1 ; Port A (AIO 0-31) of an Acc-75 with SW1 switches all ON

; assigned for read only (1=0+1)

Similarly, to address Port B of the same board #1 as an output using M101, use the following definition:

M101->TWS:6 ; Port B (BIO 0-31) of an Acc-75 with SW1 switches all ON

; assigned for write only (4+2=6)

To address Port A of board #6 as an input using M300, use the following definition:

Board #

Byte(Port A & Port B)

40 & 44

OFF

M300->TWS:41 ; Port A (AIO 0-31) of an Acc-75 with SW1 switches

; assigned for read only (41=40+1)

Note

A 32-bit Read or a 32-bit Write to an individual port takes approximately 64

microseconds of time in the PMAC’s background time slot. As a result, excessive

and unnecessary references to TWS type M-variables are not recommended (see

below for efficient Acc-75 I/O processing).

Note

TWS type M-variable definition addresses which point to the base address directly

(e.g. M300->TWS:40) are still valid (i.e. they do not generate error). However,

their use is very strongly discouraged. This is because both reads and writes are

enabled when the least significant and the next least significant address bits are

both zero (e.g. hexadecimal 40 = 01000000 in binary). In this situation, any

accidental read of an output port (say via the Executive programs watch window)

will cause all the output transistors to be turned off (outputs pulled to the supply

voltage). Alternatively, writing to an input port will automatically reconfigure it to

an output port. Therefore, it is safer and more predictable when bits 0 and 1 of the

M-variable definition are intentionally used to disable either the read function or

the write function.

Accessory 75

10 Processing Acc-75 Inputs and Outputs

PROCESSING ACC-75 INPUTS AND OUTPUTS

Because the PMAC interface to the Accessory 75 I/O board (Acc-75) is by full, 32-bit words transmitted

serially (even when access to only a single bit is desired), the user must consider carefully how the

interface is done and how frequently. Care must also be taken to work efficiently with the data so that

PMAC is not bogged down with slow serial reads and writes, and time-consuming logic to assemble and

disassemble I/O words.

The recommended strategy is to keep "images" of each input or output word in PMAC’s internal memory,

or in the dual-ported RAM. The input words are copied into their image words, and the output words are

copied from their image words. Most program operations deal with these image words; this way, slow

transfer to or from an Acc-75 board is performed less frequently. During the act of copying, bit inversion

can also be performed with the exclusive-or function.

When to Access Acc-75

The actual reads and writes for an Acc-75 board can only be done in a background PLC program (PLC 1-

31) or through on-line commands, which are executed between PLC programs. Motion programs and

PLC 0 cannot directly access this I/O (they can work only with the image words). Reading an input word

from an Acc-75 is simply a question of using the TWS-form M-variable for that word on the right side of

an equation. Usually, this operation simply copies the input word into its internal image variable.

Similarly, writing an output word to an Acc-75 involves using the M-variable for that word on the left

side of an equation, typically just copying it from its internal image word.

Most users will treat Acc-75 I/O the same way that a traditional PLC treats its I/O; all of the inputs are

read at the beginning of a PLC software scan, and all of the outputs are written to at the end of the scan.

In between, all the processing of the variables is done while working with the internal image words. It is

possible to make the write operation to the output word conditional on a change in the image word for the

output from the previous scan, but the time involved in making the decision and storing each scan's value

is about the same as the actual writing to the output.

Software

The OEM is responsible for developing the software to access the SNAP I/O and to utilize this

information in a system. During the development and testing of the Acc-75, there are a number of

routines, which may be helpful in the development of the OEM software. These routines are provided for

informational purposes only. Delta Tau, Inc., does not accept any responsibility for the OEM application

or equipment. The OEM must review the software provided, decide how much is applicable to a specific

application, and develop the software appropriate to the application at hand.

Development Tools

The PMAC Executive (Pro or non-Pro) is required to communicate to the PMAC and to download

programs/settings to PMAC. In addition, program files may be edited with the PMAC Executive Editor

or with editors available from others.

Quick Start

The simplest way to illustrate how to use the I/O in a real application is to present the following example.

A few points to remember are:

1. Map the I/O points to the PMAC M-Variables.

2. Use a single compiled PLC to interface to the I/O hardware via Acc-75.

3. Do not read or write to Acc-75 more often than necessary.

4. Keep an image of the inputs and outputs.

5. Use the images in the programs.

6. Check the parity error bit on each read of the inputs.

Accessory 75

Processing Acc-75 Inputs and Outputs 11

Usually, Acc-75 I/O is treated the same way that a traditional PLC treats its I/O:

 The inputs are read at the beginning of a PLC software scan.

 The processing of the variables is done working with the internal image words (The logic is solved

based on the current input image).

 The outputs are written to at the end of the scan.

Note:

The following examples are applicable to all PMACs. The specific memory

locations used are fine for all PMACs including PMAC PC, PMAC VME, PMAC

Lite, PMAC Universal Lite, and Mini PMAC. If using a PMAC2 or a Turbo

PMAC, consult the PMAC Manual for available memory locations.

Map the I/O Points to PMAC M-Variables

Review the On-Line Command section of the PMAC Software Reference manual as a supplement to this

section.

Things to Know

 The Acc-34AA device and Acc-75 work the same way.

 TWS addresses should be setup as read or write only.

 Do not read from a write only variable.

 Do not write to a read only variable.

 Only read or write to the hardware when necessary.

 The individual bits of a TWS device like Acc-75 cannot be written to individually. Only 32-bit words

can be accessed.

Accessory 75

12 Acc-75 Setup

ACC-75 SETUP

For the purpose of Acc-75 setup, the following example will demonstrate how to utilize 32 inputs and 32

outputs of an Acc-75. The following three variables will be used during the Acc-75 I/O procedure:

Actual Word Variable

Variable which is read or written to by Acc-75 and PMAC

Image Word Variable

Variable assigned set equal to (Image) actual word variable

Image Bit Variable

Single bit of image word variable

Image Word Variables

It is best to use fixed-point M-variables as the internal image variables for the I/O words. When this is

done, a single M-variable representing the entire I/O word can be used for the copying operation. Then

separate M-variables can be used to access individual bits or segments of the image word. Use of these

smaller M-variables allows PMAC’s efficient firmware to do the masking and logic necessary to pick out

portions of the I/O word, rather than slower user program code.

PMAC Location of Image Words

The internal images reside in PMAC’s memory as follows:

Open Memory — Standard PMAC

For a standard PMAC with no DPRAM on board, the image word will be in an otherwise unused double

are set to zero automatically on power-up. There are 16 more open registers at PMAC addresses $07F0 to

$07FF, whose values are held when power is off. It is possible to use the registers of otherwise unused P

and Q-variables for this purpose.

Access these registers with fixed-point M-variables, not floating-point P or Q-variables. A double fixed-

point register in PMAC’s internal memory is defined by the D format of M-variable (e.g. M61-

>D:$07F0). This is a 48-bit register (only the low 32 bits will be used). The low 24 bits of the I/O will

be in the Y-memory, and the high eight bits of the I/O will be in the low eight bits of X-memory.

DPRAM — Standard PMAC

If the system has dual-ported RAM, use a 32-bit register in DPRAM. This way, the host computer always

has immediate access to the I/O. In fact, PMAC can be used just as a pass-through between the host

computer and the Acc-75 boards, letting the host computer do all the processing. A 32-bit fixed-point

variable occupies the low 16 bits (bits 0 to 15) of PMAC Y-memory, and the low 16 bits of PMAC X-

memory at the same address, with the less significant bits in Y-memory. It appears to the host computer

as two 16-bit registers at consecutive even addresses, with the less significant bits at the lower address.

Turbo PMAC Location of Image Words

Open Memory Turbo PMAC

For a Turbo PMAC with no DPRAM on board, the image word will be in an unused double register in

Turbo PMAC’s own memory. There are 16 open registers at Turbo PMAC addresses $0010F0 to

$0010FF that are set to zero automatically on power-up. Also, use the registers of otherwise unused P

and Q-variables for this purpose.

Access these registers with fixed-point M-variables, not floating-point P or Q-variables. A double fixed-

point register in PMAC’s internal memory is defined by the D format of M-variable (e.g., M80-

>D:$0010F0). This is a 48-bit register (only the low 32 bits will be used). The low 24 bits of the I/O will

be in the Y-memory, and the high eight bits of the I/O will be in the low eight bits of X-memory.

Accessory 75

Acc-75 Setup 13

When using the Acc-75 I/O with fixed-point image variables, the only software overhead is the actual

copying between image and I/O. Including program interpretation time, this amounts to about 100

microseconds per 32-bit word. Aside from this, working with the I/O through the image words is at least

as fast as direct (parallel) PMAC I/O. There is a potential latency of a full PLC scan on the actual I/O,

which must be respected. Many systems will have a few critical I/O points that cannot tolerate this

latency; typically these use PMAC’s JOPTO port or Acc-14 I/O for these time-critical points, then use

Acc-75 for I/O that do not need to be so fast.

DPRAM Standard Turbo PMAC

If the system has dual-ported RAM (Option 2 is required), use a 32-bit register in DPRAM. This way, the

host computer always has immediate access to the I/O. In fact, PMAC can be used just as a pass-through

between the host computer and the Acc-75 boards, letting the host computer do all the processing. A 32-

bit fixed-point register in DPRAM is defined by the DP format of M-variable (e.g. M80-> DP:$060000).

This type of variable occupies the low 16 bits (bits 0 to 15) of PMAC Y-memory, and the low 16 bits of

PMAC X-memory at the same address, with the less significant bits in Y-memory. It appears to the host

computer as two 16-bit registers at consecutive even addresses, with the less significant bits at the lower

address.

Preventing Conflicts in Output Image Words

Care must be taken if tasks of different priority levels are trying to write to the same output image word,

or if both the host computer and PMAC are trying to write to the same DPRAM output image word. If

the proper techniques are not used, occasional output changes will not be executed, and because of the

intermittent nature of the problem, it will be very difficult to diagnose. If the application has two priority

levels or two computers that write to the same Acc-75 output word, separate partial image words must be

used. These words combined as the output word is sent.

Note:

There is no conflict in having different tasks or different processors read from the

same input word.

Remember that a computer cannot actually write to less than a word of memory at

a time, even if it only wants to change one bit. In PMAC, the word length is 24

bits; for the DPRAM, it is 16 bits. If a computer wants to change less than a full

word, it must read the full word, modify the bits it wants with mask words, then

write back the full word.

There are two priority levels in PMAC that can write to these image words: the foreground level, which

includes all of the motion programs and PLC 0; and the background level, which includes PLCs 1-31 and

on-line commands. The problem can occur when a higher priority task interrupts a lower priority task

that is in the middle of changing the image word with a read-modify-write operation. When the lower

priority task resumes, it will undo the changes made by the higher priority task. Similarly, if the image

word is in the DPRAM, and one side starts its read-modify-write cycle on the word but does not finish it

before the other side starts its own cycle, the side that starts later can undo the changes made by the side

that starts first.

Note:

Two tasks at the same priority level cannot interrupt each other; one will always

finish an operation before the other starts. Therefore, there is no need to worry

about two motion programs writing to the same image word; or a motion program

and PLC 0; because these tasks are at the same priority level. Similarly, there is no

need to worry about two background PLC programs writing to the same image

word, or a background PLC and on-line commands.)

Accessory 75

14 Acc-75 Setup

To prevent this possible conflict, the different priority levels or different processors must use different

image words, even if they each represent only a part of the same total output word. These partial words

are then combined in the act of writing to the actual output word.

The simplest way to split an image word is to use the natural X-memory vs. Y-memory split in PMAC’s

memory. If using a double word in PMAC’s internal memory, reserve the 24 bits in Y-memory for one

priority level, and the eight bits in X-memory for the other. If using the DPRAM, reserve the 16 bits in

Y-memory for one processor or priority level, and the 16 bits in X-memory for another. If using the

memory way, no special techniques need to be used. On PMAC, simply write to the partial words with a

X or Y format M-variable; PMAC will do the read-modify-write cycle automatically without touching the

other part of the word. On the host computer, access the DPRAM register with the short (16-bit) integer

format, not the long.

However, if the split cannot be arranged in this fashion, create separate overlapping image words and

explicitly combine them.

Example: Take a system in which the low 12 bits will be written to by background PLCs and the high 20

bits will be written to by motion programs. Create two separate image words: one for each priority level,

and the actual output word:

PMAC

Turbo PMAC

Comments

M101->D:$0770

M81->D:$0010F0

Image word for PLC programs (background)

M102->D:$0771

M82->D:$0010F1

Image word for motion programs (foreground)

M103->TWS:6

M83->TWS:6

Acc-34x output word; write-only

Also, single-bit M-variables are defined to parts of these same internal addresses: at Y:$0770 ($0010F0

for Turbo), bits 0 to 11 for the PLCs; then at Y:$0771($0010F1 for Turbo), bits 12 to 23, and

X:$0771($0010F1 for Turbo), bits 0 to 7 for the motion programs. At the end of a PLC scan, to create the

actual output word on an Acc-75 from the image words, we would use the program statement:

M103 = (M101 & $00000FFF) | (M102 & $FFFFF000)

The bit-by-bit AND (&) operations make sure no falsely set bits in unused portions of the image words

get into the output word. They are not strictly necessary if the unused bits can be guaranteed to be zero.

The bit-by-bit OR ( | ) operation combines the word. The assignment of the resulting value to M103

causes it to be written to the Acc-75.

To write to the same bit of an output image word with two different priority levels or processors, one of

the tasks must do so indirectly by writing into a holding register. The other task must take this holding

conflict (i.e., one task wants to clear the bit, and the other wants to set it).

The following example illustrates the method of working with Acc-75 I/O. It describes the procedure for

memory allocation, for the inputs, and for the outputs (Image Word Variables) that will work with either

Dual Ported RAM or PMAC memory locations

Example: This example shows the image variables both in DPRAM and several places in internal

memory. In a real application, a single location range probably would be chosen.

Set-up and Definitions

Actual Acc-34 I/O Words

M1000->TWS:1

First side of first Acc-75 board; an input here

Location is at port address 0; added 1 for read only

M1002->TWS:6

Second side of first Acc-75 board; an output here

Location is at port address 4 added 2 for write only

M1004->TWS:9

First side of second Acc-75 board; an input here

Location is at port address 8; added 1 for read only

M1006->TWS:14

Second side of second Acc-75 board; an output here

Location is at port address 12; added 2 for write only

Accessory 75

Acc-75 Setup 15

Image Words

PMAC

Turbo PMAC

Comments

M1001->DP:$D800

M1001->DP:$060800

32-bit fixed-point DPRAM register

M1003->D:$0770

M1003->D:$0010F0

48-bit fixed-point register, set to zero on power-up

M1005->D:$07F0

* Power-down hold

registers are not

available in Turbo

PMAC

M1005->D:$0061F0

PMAC: 48-bit fixed-point register, value held through

power-down

Turbo PMAC: use this register for P-variable, treated as

48-bit fixed point value

M1007->D:$13FF

M1007->D:$0063FF

* User Buffer Storage Space is same for the battery-backed Turbo PMAC.

Individual Pieces of Image Words

PMAC Memory Locations

Port A Setup: Read Only

PMAC

Turbo PMAC

Comments

M1000->TWS:1

Port A (AIO 0-31)

M1001->D:$770

M1003->D:$0010F0

Image word for PLCs

M800->Y:$770,0

M800->Y:$0010F0,0

Bit0 (LSB)

M801->Y:$770,1

M801->Y:$0010F0,1

Bit1

M802->Y:$770,2

M802->Y:$0010F0,2

Bit2

M822->Y:$770,22

M822->Y:$0010F0,22

Bit22

M823->Y:$770,23

M823->Y:$0010F0,23

Bit23

M824->X:$770,0

M824->X:$0010F0,0

Bit24

M825->X:$770,1

M825->X:$0010F0,1

Bit25

M830->X:$770,6

M830->X:$0010F0,6

Bit30

M831->X:$770,7

M831->X:$0010F0,7

Bit31 (MSB)

Port B Setup: Write Only

PMAC

Turbo PMAC

Comments

M1002->TWS:6

Port B (BIO 0-31)

M1003->D:$771

M1003->D:$0010F1

Image word for PLCs

M900->Y:$771,0

M900->Y:$0010F1,0

Bit0 (LSB)

M901->Y:$771,1

M901->Y:$0010F1,1

Bit1

902->Y:$771,2

M902->Y:$0010F1,2

Bit2

922->Y:$771,22

M922->Y:$0010F1,22

Bit22

923->Y:$771,23

M923->Y:$0010F1,23

Bit23

924->X:$771,0

M924->X:$0010F1,0

Bit24

925->X:$771,1

M925->X:$0010F1,1

Bit25

M930->X:$771,6

M930->X:$0010F1,6

Bit30

M931->X:$771,7

M931->X:$0010F1,7

Bit31 (MSB)

Accessory 75

16 Acc-75 Setup

PMAC Dual-Ported RAM Locations

Port A Setup: Read Only

PMAC

Turbo PMAC

Comments

M1000->TWS:1

Port A (AIO 0-31)

M1001->DP:$D800

M1001->DP:$060800

Image word for PLCs

M800->Y:$D800,0

M800->Y:$060800,0

Bit0 (LSB)

M801->Y:$D800,1

M801->Y:$060800,1

Bit1

M802->Y:$D800,2

M802->Y:$060800,2

Bit2

M814->Y:$D800,14

M814->Y:$060800,14

Bit14

M815->Y:$D800,15

M815->Y:$060800,15

Bit15

M816->X:$D800,0

M816->X:$060800,0

Bit16

M817->X:$D800,1

M817->X:$060800,1

Bit17

M830->X:$D800,14

M830->X:$060800,14

Bit30

M831->X:$D800,15

M831->X:$060800,15

Bit31 (MSB)

Port B Setup: Write Only

PMAC

Turbo PMAC

Comments

M1002->TWS:6

Port B (BIO 0-31)

M1003->DP:$D801

M1003->DP:$060801

Image word for PLCs

M900->Y:$D801,0

M900->Y:$060801,0

Bit0 (LSB)

M901->Y:$D801,1

M901->Y:$060801,1

Bit1

M902->Y:$D801,2

M902->Y:$060801,2

Bit2

M914->Y:$D801,14

M914->Y:$060801,14

Bit14

M915->Y:$D801,15

M915->Y:$060801,15

Bit15

M916->X:$D801,0

M916->X:$060801,0

Bit16

M917->X:$D801,1

M917->X:$060801,1

Bit17

M930->X:$D801,14

M930->X:$060801,14

Bit30

M931->X:$D801,15

M931->X:$060801,15

Bit31 (MSB)

Programs: ; Reset PLC program that only runs once on

; power-up or reset

OPEN PLC 1 CLEAR

M1003=0 ; Clear output image word to make sure all outputs off

M1007=0 ; Ditto

...

DISABLE PLC 1 ; To make sure this only runs once on power-up/reset

; PLC program to copy the inputs into image

; words at beginning of each scan

OPEN PLC 2 CLEAR

M1001=M1000 ; Copy first input word into its image

; register

M1005=M1004^$FFFFFFFF ; Copy second input word into its image

; register, inverting

...

; PLC program that works with individual

; bits of image words

OPEN PLC 3 CLEAR

IF (M100=1 AND M101=0 AND P43>50)

M301=1

ELSE

M301=0

ENDIF

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Delta Tau Acc-75 Owner's manual

Delta Tau Acc-75 Owner's manual

Delta Tau Acc-75 Owner's manual

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