Humandata ACM-201-70C8 User manual

Brand
Humandata
Model
ACM-201-70C8
Type
User manual

This manual is also suitable for

HuMANDATA LTD
Cyclone II FPGA Board
ACM-201 Series Rev4
User’s Manual
Ver. 3.0
Table of Contents
Revision History .............................................................................................. 1
Introduction .................................................................................................... 1
1. Unused Pins [IMPORTANT] .............................................................................. 2
2. Specifications ..................................................................................................... 3
3. Overview ............................................................................................................ 4
3.1. Name of Parts .......................................................................................................4
3.2. Block Diagram ......................................................................................................5
3.3. Power Supply V33A .............................................................................................6
3.4. Power Supply VIO(B), VIO(C) .............................................................................6
3.5. JTAG Connector ...................................................................................................6
3.6. AS Connector ........................................................................................................7
4. Jumper Switch ................................................................................................... 8
5. FPGA Configuration ........................................................................................... 9
6. Configuration Device Programming ................................................................... 9
6.1. Programming via AS Connector ..........................................................................9
6.2. Programming via JTAG Connector .....................................................................9
7. Setting Dual Purpose Pin ................................................................................. 11
8. Additional Documentation and User Support ................................................... 11
Precautions
Do Not
1. This product uses ordinary off-the-shelf electronic components, and is therefore inappropriate for use in
applications that require special quality or reliability and are expected to protect human lives or prevent
accidents, such as safety mechanisms in fields including space, aeronautics, medicine, and nuclear
power.
2. Do not be used underwater or in high-humidity environments.
3. Do not be used in the presence of corrosive gases, combustible gases, or other flammable gases.
4. Do not turn on power when circuit board surface is in contact with other metal.
5. Do not apply voltage higher than rated voltage.
Attention
6. This manual may be revised in the future without notice owing to improvements.
7. All efforts have been made to produce the best manual possible, but if users notice an error or other
problem, we ask that they notify us.
8. Item 7 notwithstanding, HuMANDATA cannot be held liable for the consequences arising from use of
this product.
9. HuMANDATA cannot be held liable for consequences arising from using this product in a way different
from the uses described herein, or from uses not shown herein.
10. This manual, circuit diagrams, sample circuits, and other content may not be copied, reproduced, or
distributed without permission.
11. If the product emits smoke, catches fire, or becomes unusually hot, cut the power immediately.
12. Be careful of static electricity.
13. This product may be subject to the export restrictions of Japan, the United States, or other countries.
Purchasers are responsible for properly observing export restrictions.
14. HuMANDATA firmly refuses to export (including reexporting) products to countries or regions subject to
export restrictions.
Product Warranty and Scope of Support
1. HuMANDATA guarantees that its products can be assembled as shown in published circuit diagrams and other design documents.
There may be differences between actual components or their prescribed quantities and model numbers and those shown in circuit
diagrams.
2. Except for the guarantee in item 1, above, no guarantees whatsoever are made. When assembling the product as shown in a circuit
diagram is impossible, and the problem can be solved by revising the diagram, HuMANDATA will revise the diagram. When a problem
can be solved only by replacing components or modifying the product, HuMANDATA will take back the product to replace it with a
properly functioning product.
3. If the problem is minor, HuMANDATA will sometimes describe how to make the revision or modification, and ask the customer to
solve the problem.
4. HuMANDATA will determine how to honor the warranty, as through repair, replacement, return, or other action. The customer cannot
specify what action to take.
5. FPGAs and other components used in products sometimes have characteristic defects. Returns and replacements are not possible
even if such defects are discovered, whether before or after purchase.
6. HuMANDATA shall not be obligated to inform customers about defects in the main components used in products.
7. HuMANDATA shall not be obligated to provide support for products, or to provide support for the software of other companies needed
to use HuMANDATA products.
8. Published documentation shall be limited to that published by HuMANDATA at the time of product purchase, and HuMANDATA shall
not be obligated to provide any other documentation.
9. When repairs or replacements are provided under warranty in Japan, purchaser shall pay shipping charges for shipping to
HuMANDATA, and HuMANDATA shall pay shipping charges for shipping to purchaser.
10. When shipping from outside of Japan, purchaser shall pay all expenses including shipping charges and taxes.
11. Under whatever circumstances, HuMANDATA shall provide support for its products for a maximum of one year after shipping from
factory.
12. The Warranty is not applicable and support ends in the event of fire, storm and flood damage, earthquakes, lightning strikes, and
other natural disasters, as well as conflict or other occurrences.
13. Purchaser is assumed to have read and understood all the above when purchasing a HuMANDATA product.
Limitation of Liability
1. Purchasers assume all liability associated with the use of this product.
2. HuMANDATA assumes no liability whatsoever for any direct, indirect, special, incidental, or consequential damages arising from the
use of this product, even if HuMANDATA has been advised of the possibility of such damage, whether legal or in tort.
3. At the time this product is purchased, items 1 and 2 above shall be deemed to have been confirmed by purchaser.
Trademarks and Other Considerations
1. This manual uses various companies’ trademarks in places.
2. HuMANDATA is this company’s registered trademark.
HuMANDATA’s Philosophy
1. HuMANDATA endeavors to raise product quality. We continually make detailed improvements and adjustments that are not shown
in circuit diagrams.
2. HuMANDATA actively publishes, on the Web and in other ways, information considered useful to customers. Examples would be
how to use FPGAs and how to use development tools.
3. HuMANDATA makes efforts for the long-term provision of products and for continuing their long-term support.
4. Instead of concealing small product problems and documentation errors, HuMANDATA makes them public.
5. HuMANDATA abides by Japanese law and its spirit. We make no transactions with purchasers who commit illegal acts.
ACM-201 Series v3.0 1
Revision History
Date
Revision
Description
Feb. 13, 2023
v3.0
Revised: Product Revision to Rev4
Introduction
Thank you for buying our product ACM-201.
This is an evaluation board equipped with an Intel (Altera) Cyclone II, power,
reset, and clock circuit and configuration device.
It can provide you with very convenient and easy-to-use environment.
ACM-201 Series v3.0 2
1. Unused Pins [IMPORTANT]
Some unused I/O pins are connected to GND or VCCINT (1.2 V).
Smaller FPGAs use those pins as general-purpose I/Os, but larger FPGAs use
those pins as GND or VCC.
Therefore, they must be set as “As input tri-stated”.
If you forget to set the pins properly, large current will flow and damage FPGA
and peripheral circuit.
To set the unused I/O pins follow the steps below:
1. Open “Assignments” and click “Device…”
2. Click “Device & Pin Options…” button
3. Open “Unused Pins” tab
4. Set Reserve all unused pins as “As input tri-stated”
ACM-201 Series v3.0 3
2. Specifications
Model Name
ACM-201-35C8 ACM-201-50C8 ACM-201-70C8
FPGA
EP2C35F672C8N
EP2C50F672C8N
Config. Device
EPCQ64ASI16N (Intel, 64Mbit)
SRAM
IDT71V016SA10PHG (IDT, 1Mbit / 64k x 16bit)
SDRAM
MT48LC16M16A2TG-75-D (MICRON, 256Mbit / 16M x 16bit)
Serial Flash-Memory
M25P40-VMN6P (STM, 4Mbit)
User I/Os
296
On-Board Clock
18.432 [MHz], 30 [MHz] (External inputs are available)
User Switch
2 Push buttons
User LED
2
Status LED
2 (POWER, DONE)
Power-On Reset
240 [ms] typ. (Configuration Reset Signal)
JTAG Connector
DIL 10-pin socket, 2.54 [mm] pitch
AS Connector
DIL 10-pin socket, 2.54 [mm] pitch
Power Input
DC 3.3 [V]
(Internal power is generated by an on-board regulator.)
PCB
10 Layer FR-4 t1.6 [mm] Immersion gold
Dimensions
3.386" x 2.126" (86 x 54 [mm])
Weight
32 [g] typ.
User I/O Connectors
FX10A-80P/8-SV1 (Hirose)
Accessories
DIL10 long pin header (Mounted) x 1
FX10A-80S/8-SV (Hirose) x 2
FX10A-100S/10-SV (Hirose) x 2
2 Jumper sockets
RoHS Compliance
YES
* There may be cases that these parts and specifications are changed.
ACM-201 Series v3.0 4
3. Overview
3.1. Name of Parts
Component Side
Solder Side
Config. Device
User I/Os (CNC)
Power & POR
DONE LED
Oscillators
30 MHz
18.432 MHz
User LEDs
User I/Os (CND)
User I/Os (CNA)
User I/Os (CNB)
User Switches
FPGA
JTAG Connector
AS Connector
SDRAM
Flash Memory
SRAM
Power LED
Config. Mode
Setting Jumpers
ACM-201 Series v3.0 5
3.2. Block Diagram
Cyclone-II
EP2C35/50/70
F672C8N
Power Circuit
1.2 V
Power LED (3.3V)
DONE LED
Config. Device
Us er I/Os CNA
Us er I/Os CNB
n C O NFIG
Power-on Reset
Typ. 240ms
Config. Switch
JTAG
Oscillator
30 MHz
18.432 MHz
User LED
User Switch
64 +2 (CLK)
Us er I/Os CNC
Us er I/Os CND
84 +2 (CLK)
152
V IO(D) INPUT
Ext e rnal CLK
V IO(B) INPUT
Ext e rnal CLK
V IO(C) INPUT
Ext e rnal CLK
3.3 V INPUT
Ext e rnal CLK
64 +2 (CLK)
84 +4 (CLK)
154
S R AM (1Mb)
SDRAM (256Mb)
SPI Flash
(4Mb)
AS
2
2
ACM-201 Rev.D
ACM-201 Series v3.0 6
3.3. Power Supply V33A
This board operates from single DC 3.3 V power supply.
The external power supply should be sufficient and stabilized.
Please apply power to CNA, CNB, CNC and CND with
thick print pattern or cable. Please connect all ground pins.
3.4. Power Supply VIO(B), VIO(C)
V33A, VIO(B), VIO(C) is separated. You can input VIO(B) from CNB and also
VIO(C) from CNC and CND.
And also by mounting R1, V33A can be input to VIO(B) and by mounting R2, V33A
can be input to VIO(C). For more details, please refer to circuit schematics.
3.5. JTAG Connector
This connector is used to configure the FPGA.
Pin assignment is as follows.
CN1
Net Label
Signal
Name
JTAG Pin
Signal
Name
Net Label
XTCK
TCK
1
2
GND
GND
XTDO TDO 3 4 VCC VCC
XTMS
TMS
5
6
-
-
- - 7 8 - -
XTDI
TDI
9
10
GND
GND
Notes
ACM-201 Series v3.0 7
3.6. AS Connector
This connector is used to configure the configuration device in-system.
Pin assignment is as follows.
CN2
Net Label
Signal Name
JTAG Pin
Signal Name
Net Label
XDCLK
DCLK
1
2
GND
GND
XCONFDONE CONF_DONE 3 4 VCC VCC
XNCONFIG
nCONFIG
5
6
nCE
nCE
XDATAO DATAOUT 7 8 nCS nCS
X_ASDO
ASDI
9
10
GND
GND
Please use attached long pin header when you connect download cable.
Please pay attention not to attach cables in reverse.
Notice
ACM-201 Series v3.0 8
4. Jumper Switch
JP1 is used to set FPGA’s MSEL0 and MSEL1.
(Quoted from Altera’s data sheet)
JP1
MSEL
1 – 2
MSEL1
3 – 4 MSEL0
AS mode: JP1 (1 – 2: Short, 3 – 4: Short)
MSEL1 = 0
MSEL0 = 0
JTAG mode: JP1 (1 – 2: Short, 3 – 4: Open)
MSEL1 = 0
MSEL0 = 1
ACM-201 Series v3.0 9
5. FPGA Configuration
To configure the FPGA via JTAG, please refer to the following steps.
1. Open [Tools] menu, then click [Programmer].
2. Select [JTAG] from [Mode] list.
3. Open [Processing] menu, then click [Auto Detect].
4. Double-click [none] and select the sof file you made.
5. Check [Program/Configure] and [Verify].
6. Open [Processing] menu, then click [Start].
If configuration is completed successfully, the DONE LED will light up.
Advice
Check if FPGA device name you set is same as that on the board.
Please check unused pins setting. (See section.1)
Quartus II help will give you more information.
6. Configuration Device Programming
6.1. Programming via AS Connector
To program the configuration device in AS mode, please refer to the following
steps.
1. Open [Tools] menu, then click [Programmer].
2. Select [Active Serial Programming] from [Mode] list.
3. Open [Edit] menu, then click [Add File…].
4. Select the pof file you made.
5. Check [Program/Configure] and [Verify].
6. Open [Processing] menu, then click [Start].
6.2. Programming via JTAG Connector
To program the configuration device via JTAG , you need to prepare jic (JTAG
Indirect Configuration) file. You can generate jic file from sof file using Quartus II.
Please refer to the following steps.
Generating jic file
1. Open [File] menu, then click [Convert Programming Files].
2. Select [JTAG Indirect Configuration File] from [Programming file type] list.
ACM-201 Series v3.0 10
3. Select the device name which on the board from [Configuration device] list.
4. Fill the [File name] as you like.
5. Click [Add Device], then select [Device family] and [Device name].
6. Click [Add File…], then select the sof file for input file.
7. Click [Generate].
Programming Configuration Device
8. Open [Tools] menu, then click [Programmer].
9. Select [JTAG] from [Mode] list.
10. Open [Processing] menu, then click [Auto Detect].
11. Select the jic file you made.
12. Check [Program/Configure] and [Verify]
13. Open [Processing] menu, then click [Start].
After programming is completed successfully, turn off and on the power.
Configuration data in the configuration device will be automatically loaded into the
FPGA.
Advice
Check if the configuration device name, FPGA device family name and
device name you selected in step 3 and 5 are same as those on the board.
Quartus II help will give you more information.
ACM-201 Series v3.0 11
7. Setting Dual Purpose Pin
The pin listed below is allocated to nCEO.
NET LABEL
FPGA Pin
RAM A11 AE24
This pin cannot be used as I/O without setting. Here are steps for the setting.
1. Open “Assignments” and click “Device…”, then click “Device & Pin Options...”
2. Open Tab ”Dual-Purpose Pins”, then set nCEO’s to “Use as regular I/O”.
8. Additional Documentation and User Support
The following documents and other supports are available at
https://www.hdl.co.jp/en/spc/ACM/acm-201/
Circuit Schematic
Pin List
Outline drawing
PCB drawing
Net List
… and more.
Cyclone II FPGA Board
ACM-201 Series Rev4
User’s Manual
Ver. 3.0 ............................................Feb. 13, 2023
HuMANDATA LTD.
Address: 1-2-10-2 F, Nakahozumi, Ibaraki
Osaka, Japan
ZIP 567-0034
Tel: 81-72-620-2002 (Japanese)
Fax: 81-72-620-2003 (Japanese/English)
URL: https://www2.hdl.co.jp/en/ (Global)
https://www.hdl.co.jp (Japan)
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Humandata ACM-201-70C8 User manual

Brand
Humandata
Model
ACM-201-70C8
Type
User manual
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