07
5.4 Power on Delay Time
5.3 PS ON Signal on/off Control
5.5 Rise time
5.6 Serial Bus Interface
The electrical and timing characteristics of the PWOK signal are given in below.
Signal type +5V TTL compatible
Logic level low < 0.4V while sinking 4 mA
Logic level high Between 2.4V and 5.25V output while sourcing
200 uA
High state output impedance 1KΩ
PWOK delay time 100ms < T3 < 500ms
AC loss to PWOK hold up time T4 ≧ 10ms
PWOK turn off delay time T5 ≧ 1ms
5. For test purposes, the PWOK signal shall be terminated at the output
power supply connector with a 0.01uF ceramic capacitor.
6. When only one power module, the AC loss to PWOK hold up time
10ms at 70% load condition.
PS ON is an active-low, TTL-compatible signal that allows a motherboard
to remotely control the power supply in conjunction with features such as
soft on/off. The OFF/ON cycle with a minimum OFF time is 1s.
The power supply shall provide an internal pull-up to TTL high. The power
supply shall also provide de-bounce circuitry on PS ON to prevent it from
oscillating on/off at startup when activated by a mechanical switch.
The power-on time is defined as the time from when PS ON is pulled low to
when the +12V, +5V and +3.3V outputs are within the regulation ranges
specified in Section 3.1. The power-on time shall be less than 400ms.
The output voltages shall rise from 10% to 90% of nominal to within the
regulation ranges specified in Section 3.1 within 0.1ms to 70ms.
The system will utilize PMBus for communication between itself and the
power supply. The bus is to be compatible with both SMBus 2.0‘high power’
and I2C. The bus will be 3.3V. A voltage shifting circuit may be needed to
accomplish this. Except where specifically called out, there will be no
pull-ups in the power supply. The pull-ups will be provided external to the
power supply via 4.7K~10Kohm in the host system.
Signal Minimum Maximum
VIL, Input Low Voltage 0V 0.8V
IIL, Input Low Current (Vin = 0.4 V) - -1.6mA
VIH, Input High Voltage 2.0V 5.25V