Introduction
ROBO-598 User’s Manual 1-6
1-3 System Architecture
In the following illustration, ROBO-598 gives a highly integrated system solution
and a most up-to-date system architecture, which includes two main VLSI chips
M1541/M1543C to support the Parity/ECC, PBSRAM, SDRAM, ACPI, Ultra-33
IDE Master, USB, PS/2 Keyboard/Mouse function, AGP graphics and Pentium-
compatible processors.
The North Bridge M1541 provides a complete integrated solution for the system
controller and data path components in a Pentium processor system. It provides a 64-
bit CPU bus interface, 32-bit PCI bus interface, 64/72 DRAM data bus with ECC or
parity to support three DIMMs, secondary cache interface, PCI master to DRAM
interface, and 4 PCI masters for external backplane support. In addition, it has a
built-in PCI-to-PCI bridge device to support the AGP interface (on board 3D VGA)
with 2X mode for high performance 3D graphics applications.
Specially, the M1541 integrates a high performance L2 write back/dynamic write
back direct mapping cache controller using MESI protocol of L1 and L2 to maintain
the data coherence for optimizing CPU bus utilization. The on-board L2 cache is
configured for Pipelined Burst SRAM with cache size 512KB in factory default. The
cacheable region can be up to 128MB cache memory configuration by using 8-bit
TAG RAM or using internal TAG SRAM to acquire cacheable region up to 512MB.
The South Bridge M1543C provides a highly integrated PCI-to-ISA bridge solution
for the best industry application. It comprises a 2-channel dedicated Ultra DMA-33
IDE master interfaces, Plug-and-Play port, and APIC interface. It also supports PS/2
keyboard and mouse controller, 2-port USB (Universal Serial Bus feature), PCI 2.1
Compliance operation, and the Super I/O function which includes two high speed
serial ports, one parallel port, FIR port, and FDD interface port.
In addition, the M1543C also provides XD-bus to support BIOS read/write access
and real-time clock (RTC) to maintain date and time of a system. A standard 16-bit
ISA bus interface is applied for all of slower I/O operations. In ROBO-598, it
contains watch-dog timer (WDT) enabled by jumper setting and trigger by software,
disk-on-chip (DOC) for M-system Flash disk, and ISA buffer for special I/O
applications and driving of multi-ISA slots. The detail operating relations are shown
in Figure 1-1 ROBO-598 System Block Diagram.
