CPU-161-18
Xeon D COMe CPU Module
USER MANUAL
First edition – June 2017 – B35071E0-MN002-00_UserMan_En_1
© 2017 Eurotech
Preface
Thank you for choosing the CPU-161-18. Please read this manual before using the CPU-161-18 so that you may
obtain the greatest benefit from using the device.
This manual presents the specifications, functions, and method of use of the CPU-161-18.
Eurotech has made every effort to carefully inspect each product and has taken great care to package and to
ship the product. In the unlikely event of the product’s failure to operate normally due to problems in shipping or
otherwise, the company will repair or replace the product at its own responsibility.
If you have any questions, contact your local Eurotech Sales Office.
Trademarks
All trademarks both marked and unmarked appearing in this document are the property of their respective owners.
This document does not give permission to the implementation of patents or other rights held by Eurotech or third
parties.
Revision history
Revision
Description
Date
1
First release
30 June 2017
CPU-161-18 USER MANUAL Table of contents
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Table of contents
Preface ........................................................................................................................................................................ 2
Trademarks .................................................................................................................................................................. 2
Revision history ........................................................................................................................................................... 2
Table of contents .......................................................................................................................................................... 3
1. Important User Information ...................................................................................................................................... 5
1.1 Safety Notices and Warnings ................................................................................................................................ 5
1.2 Life Support Policy ................................................................................................................................................. 7
1.3 Warranty ................................................................................................................................................................ 7
1.4 RoHS ..................................................................................................................................................................... 7
1.5 Technical Assistance ............................................................................................................................................. 7
1.6 Conventions ........................................................................................................................................................... 7
1.7 Electromagnetic Compatibility ............................................................................................................................... 7
2. Overview .................................................................................................................................................................... 9
3. Basic Specifications ............................................................................................................................................... 10
4. Block Diagram ......................................................................................................................................................... 11
5. Board Outline/Schematic Layout .......................................................................................................................... 12
6. Processor ................................................................................................................................................................. 13
6.1. Processor ............................................................................................................................................................ 13
6.2. Cache Memories ................................................................................................................................................ 13
7. Memory ..................................................................................................................................................................... 14
7.1. Main Memory ...................................................................................................................................................... 14
7.2. Boot ROM ........................................................................................................................................................... 14
7.3. General Purpose ROM ....................................................................................................................................... 14
7.4. EEPROM ............................................................................................................................................................ 14
8. COM Express ........................................................................................................................................................... 15
8.1. PCI Express (PEG) ............................................................................................................................................. 15
8.2. PCI Express ........................................................................................................................................................ 16
8.3. LAN ..................................................................................................................................................................... 16
8.4. SATA .................................................................................................................................................................. 16
8.5. USB3.0 ............................................................................................................................................................... 16
8.6. USB2.0 ............................................................................................................................................................... 16
8.7. UART .................................................................................................................................................................. 17
8.8. LPC ..................................................................................................................................................................... 17
8.9. SPI ...................................................................................................................................................................... 17
8.10. SMBus (System Management Bus) ................................................................................................................. 17
8.11. I
2
C Bus .............................................................................................................................................................. 17
8.12. GPIO ................................................................................................................................................................. 17
8.12.1. GPI .......................................................................................................................................................... 17
8.12.2. GPO ........................................................................................................................................................ 18
8.13. External BIOS ROM Support ............................................................................................................................ 18
8.14. Reset ................................................................................................................................................................ 18
8.15. Battery Low Alarm ............................................................................................................................................ 18
8.16. Power Button .................................................................................................................................................... 18
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8.17. Power Good ...................................................................................................................................................... 18
8.18. Speaker ............................................................................................................................................................ 18
9. FPGA ........................................................................................................................................................................ 19
9.1. GPIO Signals between FPGA and MCU ............................................................................................................ 19
9.2. LPC Bus Controller ............................................................................................................................................. 19
9.3. Address Map....................................................................................................................................................... 20
9.3.1. I
2
C Controller ............................................................................................................................................. 20
9.3.2. LED Control Register ................................................................................................................................ 21
9.3.3. WDT Control Register ............................................................................................................................... 21
10. VOLTAGE MONITORING SOFTWARE SPECIFICATIONS ................................................................................................ 23
10.1. Description of Operation ................................................................................................................................... 23
10.1.1. Voltage Monitoring Operation ................................................................................................................. 23
10.1.2. Notifying the Bit Error of FPGA Configuration Memory .......................................................................... 23
10.2. Address ............................................................................................................................................................. 24
10.2.1. Address List ............................................................................................................................................ 24
10.2.2. Detailed Description of Bit ....................................................................................................................... 25
11. Connector and Jumper/LED................................................................................................................................. 32
11.1. CPU Module Onboard Component .................................................................................................................. 32
11.1.1. LED1 (General Purpose Status LED) ..................................................................................................... 33
11.2. Setting ............................................................................................................................................................... 33
11.2.1. JP2 (CMOS_CLR Setting Pin) ................................................................................................................ 33
12. Pin Layout .............................................................................................................................................................. 34
12.1. CN1 (COM Express Stacking Connector) ........................................................................................................ 34
12.2. CN7 (Multi ISP Connector) ............................................................................................................................... 36
13. Address Map .......................................................................................................................................................... 37
13.1. IO Space ........................................................................................................................................................... 37
13.2. Memory Space ................................................................................................................................................. 38
13.3. PCI devices....................................................................................................................................................... 39
13.4. SMBus Address Map ........................................................................................................................................ 39
13.5. I
2
C Address Map ............................................................................................................................................... 39
14. BIOS ........................................................................................................................................................................ 40
14.1. Displayed Contents of BIOS Setup Menu ........................................................................................................ 40
14.1.1. BIOS Setup Menu ................................................................................................................................... 41
14.1.2. EDKII Menu ............................................................................................................................................. 42
14.1.3. Boot Manager Menu................................................................................................................................ 72
14.1.4. Boot Maintenance Manager .................................................................................................................... 72
14.2. Recording Method For an error Detected During POST .................................................................................. 75
15. Heat Sink ................................................................................................................................................................ 77
Notes ............................................................................................................................................................................ 79
CPU-161-18 USER MANUAL Important User Information
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1. Important User Information
In order to lower the risk of personal injury, electric shock, fire, or equipment damage, users must observe the
following precautions as well as good technical judgment, whenever this product is installed or used.
All reasonable efforts have been made to ensure the accuracy of this document; however, Eurotech assumes
no liability resulting from any error/omission in this document or from the use of the information contained herein.
Eurotech reserves the right to revise this document and to change its contents at any time without obligation to
notify any person of such revision or changes. Reproduction of all or part of this document without Eurotech’s
permission is prohibited.
1.1 Safety Notices and Warnings
The following general safety precautions must be observed during all phases of operation, service, and repair of
this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual
violates safety standards of design, manufacture, and intended use of the equipment. Eurotech assumes no
liability for the customer’s failure to comply with these requirements.
The safety precautions listed below represent warnings of certain dangers of which Eurotech is aware. You, as
the user of the product, should follow these warnings and all other safety precautions necessary for the safe
operation of the equipment in your operating environment.
Alerts that can be found throughout this manual
The following alerts are used within this manual and indicate potentially dangerous situations.
Danger, electrical shock hazard:
Information regarding potential electrical shock hazards:
Personal injury or death could occur. Also damage to the system, connected peripheral
devices, or software could occur if the warnings are not carefully followed.
Appropriate safety precautions should always be used, these should meet the
requirements set out for the environment that the equipment will be deployed in.
Warning:
Information regarding potential hazards:
Personal injury or death could occur. Also damage to the system, connected peripheral
devices, or software could occur if the warnings are not carefully followed.
Appropriate safety precautions should always be used, these should meet the
requirements set out for the environment that the equipment will be deployed in.
Information and/or Notes:
These will highlight important features or instructions that should be observed.
Protect the device from vibration and impact
Do not place the product in a location where it can fall or can be subject to vibration or impact because this may
cause device failure.
Do not modify the device
For safety reasons, under no circumstances should you modify the device. Eurotech will not repair products
that have been modified.
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Protect the product from water and chemicals
Contact between the product and water or chemicals can result in product failure, electrocution, or fire.
Protect the product from foreign material
Make sure that foreign material does not get into the product during use, storage, or transport because this can
result in product failure.
Use precautions in handling to ensure that you are not injured
The sharp projections on this product may cause injury. Take care in handling this product in order to avoid
injury.
Do not disassemble the product
In order to maintain guaranteed product performance, do not disassemble this product under any circumstances.
Keep the product away from radios and TVs
Do not use the product near radios, television sets, or other devices generating strong magnetic or electrical
fields. This could result in failure or malfunction.
Keep the product away from flame, humidity, and direct sunlight
Do not use or store the product in any of the following locations, as this could result in product failure:
Places where there is fire
Locations high in humidity or exposed to rain
Locations exposed to direct sunlight
Dusty or dirty locations
Locations containing excessive water or chemical vapors
Install the product in well-ventilated locations
Install the product in well-ventilated locations to efficiently disperse heat generated by the product.
Remove the power plug from the receptacle when not using the product
Turn off the main switch and remove the power plug from the receptacle when not using the product or when
there is the risk of lightning strike.
Use the device within rated parameters
Be sure to use the product within the ratings specified in this manual. Failure to do so may result in malfunction.
Use care when cleaning the product
If the product becomes dirty, wipe it with a dry soft cloth. A thinned neutral cleaner may be used if the product is
particularly dirty. Do not use benzene, thinners, or other solvents under any circumstances.
Ground the product in order to prevent electrocution
Be sure to ground the product by connecting it to a 3-pole AC receptacle or by using an AC receptacle having a
grounding terminal.
Dispose of the product properly
Use appropriate methods for handling industrial wastes when disposing of this product.
Wire the product correctly
Failure to wire the product correctly can result in malfunction or fire. Read this manual and wire the product
correctly.
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Use antistatic precautions
This product comprises electronic parts that are highly susceptible to static electricity. Static electricity can
cause the product to malfunction. Take care not to touch any of the terminals, connectors, ICs, or other parts
with the hands.
Do not use a malfunctioning product
Stop using the product if you believe it is malfunctioning. Continuing to use a malfunctioning product can cause
the malfunction to spread to other products and can cause short circuits or fire.
1.2 Life Support Policy
Eurotech products are not authorized for use as critical components in life support devices or systems without
the express written approval of Eurotech.
1.3 Warranty
For warranty terms and conditions users should contact their local Eurotech Sales Office.
Refer to the back covers of this manual for full contact details.
1.4 RoHS
This device, including all its components, subassemblies and the consumable materials that are an integral part
of the product, has been manufactured in compliance with the European directive 2011/65/EU known as the
RoHS directive (Restrictions on the use of certain Hazardous Substances). This directive targets the reduction
of certain hazardous substances previously used in electrical and electronic equipment (EEE).
1.5 Technical Assistance
If you have any technical questions, cannot isolate a problem with your device, or have any enquiry about repair
and returns policies, contact your local Eurotech Technical Support Team.
See the back cover for full contact details.
Transportation
When transporting any module or system, for any reason, it should be packed using anti-static material and
placed in a sturdy box with enough packing material to adequately cushion it.
Warning:
Any product returned to Eurotech that is damaged due to inappropriate packaging will not be covered by the
warranty.
1.6 Conventions
The following table describes the conventions for signal names used in this document.
1.7 Electromagnetic Compatibility
This product is intended for industrial assembly only and is not for commercial use. Therefore, this product is not
an apparatus and so does not need to be subject to the EMC Directive.
Convention
Explanation
GND
Digital ground plane
#
Active low signal
+
Positive signal in differential pair
-
Negative signal in differential pair
NC
No connection
RSVD
Use is reserved to Eurotech
CPU-161-18 USER MANUAL Overview
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2. Overview
CPU-161-18 is a compact module sized COM Express CPU Module, which is equipped with the Intel Xeon
Processor D-1500 family or the Intel Pentium Processor D-1500 family.
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3. Basic Specifications
Table 1 describes the specification list of this product.
CPU-161-18 specification list
Item
Details
CPU
Model
Pentium
D1519
Xeon
D-1529
Xeon
D-1539
Xeon
D-1559
Xeon
D-1527
# of cores
4
4
8
12
4
TDP
25W
20W
35W
45W
35W
Base frequency
1.5GHz
1.3GHz
1.6GHz
1.5GHz
2.2GHz
Max Turbo
Frequency
2.1GHz
n/a
2.2GHz
2.1GHz
2.7GHz
L1 cache
32kB for data, 32kB for instruction (per core)
L2 cache
256kB for data and instruction (per core)
L3 cache
1.5MB (per core)
Memory
Main Memory
2133MT/s
1600MT/s
2133MT/s
2133MT/s
2133MT/s
Memory down: DDR4 SDRAM, ECC supported, up to 8GB
DDR4 SO-DIMM socket x1, up to16GB
Boot ROM
SPI-FLASH 16MB
General Purpose
ROM
SPI-FLASH 32MB
EEPROM
64kb
COM Express
SMBus
1 port
I
2
C
1 port
UART
2 ports
LAN(GbE)
1 port
USB 2.0
7 ports
USB 3.0
4 ports
n/a
4 ports
4 ports
4 ports
GPIO
GPI：4 bits / GPO：4 bits (GPI1 can be used as a NMI)
PCI Express Gen3
16 lanes
n/a
16 lanes
16 lanes
16 lanes
PCI Express Gen2
8 lanes
16 lanes
8 lanes
8 lanes
8 lanes
LPC
1 port
Serial-ATA 6Gb
4 ports
2 ports
4 ports
4 ports
4 ports
SPI
1 port
Other
Following features are supported.
Reset
Thermal Protection
Power button
Power Good
Speaker
Power source
Specification
Power supply
VCC_12V±5%
VCC_5V_SBY±5%
VCC_RTC(2.0~3.3V)
*supplied from the COM Express connector
Current consumption
VCC_12V : Typ 3.89 A (with TDP45W Model)
VCC_5V_SBY : Typ 0.388 A
VCC_RTC (Power OFF) : Typ 2.6 uA
(Power ON) : Typ 0.1 uA
Mechanical
Specification
Standard
PICMG COM.0 COM Express Module base Spec R2.1
Pin-out type
Type6
Form factor
95mm x 95mm (Compact module size)
Weight
110g (excluding the SO-DIMM)
CPU-161-18 USER MANUAL Block Diagram
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4. Block Diagram
Figure 1 illustrates the block diagram of this product.
Figure 1. Block diagram
PEG
Intel Xeon D
1539
PCIe
PCIe
SATA
USB3.0
PCIe
LPC
DDR4 2133
SDRAM with ECC
MAX 8GB
DDR4 SO-DIMM
with ECC
MAX 16GB
FPGA
Ethernet
CTRL
SPI
FLASH
(BIOS)
X16
X4
X4
Gen3
Gen2
Gen2
COM Express
Connector
(Type 6)
PCIe
PCIe
SATA
USB3.0
LAN(GbE)
I
2
C
LPC
SPI
72
72
USB2.0
USB2.0
4
PCIe
CPU
PCH
X4
Gen3
X3
USB HUB
USB2.0
X4
USB2.0
X4
UART
UART
X2
5V BUF
X2
8
GPIO(NMI)
GPIO
MCU
SMBUS
SMBUS
MUX
FLASH
(General
Purpose)
PowerSW
RST
RST
PWROK,THERM#
WDT
R
EEP
ROM
Board Outline/Schematic Layout CPU-161-18 USER MANUAL
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5. Board Outline/Schematic Layout
Figures 2 and 3 illustrate the board outline/schematic layout of the product.
Figure 2. Component side layout
Figure 3. Solder side layout (Top view)
95
15 76 4
4
87
4
4 37 50 4
95
CN1
CN6
JP2
U1
LED1
CN7
CPU-161-18 USER MANUAL Processor
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6. Processor
6.1. Processor
The following processors can be mounted on this product.
Processor
CPU Model
Number of cores
Core frequency
(base)
Memory
frequency
TDP
D-1519
4
1.5GHz
DDR4-2133
25W
D-1529
4
1.3GHz
DDR4-1600
20W
D-1539
8
1.6GHz
DDR4-2133
35W
D-1559
12
1.5GHz
DDR4-2133
45W
D-1527
4
2.2GHz
DDR4-2133
35W
6.2. Cache Memories
The processor contains the following cache memories.
- L1 Cache
32 kB for data, and 32 kB for instruction (for each core)
- L2 Cache
256 kB shared for data and instruction (for each core)
- L3 Cache
1.5MB (for each core)
Memory CPU-161-18 USER MANUAL
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7. Memory
The memories in the CPU module are listed as follows.
7.1. Main Memory
The main memory is composed of an on-board DDR4-2133 SDRAM and a DDR4 SO-DIMM socket. The
maximum main memory is 24 GB (max. 8 GB of onboard memory + max. 16 GB of SO-DIMM).
This corresponds to ECC, which can correct a 1 bit error automatically.
7.2. Boot ROM
The BIOS is stored in the SPI-FLASH memory on CPU-161-18. This memory is 16 MB.
CPU-161-18 can also be configured to boot from a BIOS in an SPI-FLASH on the career board.
7.3. General Purpose ROM
There is another SPI-FLASH memory on CPU-161-18. This SPI-FLASH memory can be used as a general-
purpose ROM. This memory is 32 MB.
7.4. EEPROM
An EEPROM is mounted as a storage memory to store an error log of BIOS. The memory is 64 kbit.
CPU-161-18 USER MANUAL COM Express
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8. COM Express
The CPU module uses the COM Express Type 6 pin-out. This chapter describes each interface.
8.1. PCI Express (PEG)
This interface conforms to the standard of Gen3 (maximum transfer rate: 8GT/s). (*1)
It is composed of 16 lanes.
Table 3 shows the PCI Express (PEG) link configuration. The configuration can be changed from the BIOS
configuration screen.
PCI Express (PEG) Link configuration
COM Express
pin name
PCI Express
lane #
Configuration1
Configuration2
Configuration3
(Default)
PEG15
15
X 4
X 8
X 16
PEG14
14
PEG13
13
PEG12
12
PEG11
11
X 4
PEG10
10
PEG9
9
PEG8
8
PEG7
7
X 4
X 8
PEG6
6
PEG5
5
PEG4
4
PEG3
3
X 4
PEG2
2
PEG1
1
PEG0
0
*1 Xeon D-1529 supports up to 5 GT/s.
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8.2. PCI Express
This interface conforms to the standard of Gen2 (maximum transfer rate: 5 GT/s).
It is composed of 8 lanes.
Table 4 and 5 show the PCI Express link configuration. Changing this configuration requires to modify BIOS
image at low level. Please ask our sales team.
* Xeon D-1529 does not support this interface.
PCI Express Link configuration
COM Express
pin name
PCI Express
lane #
Configuration1
Configuration2
Configuration3
Configuration4
(Default)
PCIE7
7
X 1
X 1
X 2
X 4
PCIE6
6
X 1
X 1
PCIE5
5
X 1
X 2
X 2
PCIE4
4
X 1
PCI Express Link configuration
COM Express
pin name
PCI Express
lane #
Configuration1
(Default)
Configuration2
Configuration3
Configuration4
PCIE3
3
X 1
X 1
X 2
X 4
PCIE2
2
X 1
X 1
PCIE1
1
X 1
X 2
X 2
PCIE0
0
X 1
8.3. LAN
This interface conforms to the standard of 10/100/1000BASE-T.
It is composed of 1 ports.
The Ethernet controller is composed of WG210 of Intel Corporation.
8.4. SATA
This interface conforms to the standard of SATA-600 (maximum transfer rate: 6Gb/s), SATA-300 (maximum
transfer rate: 3Gb/s), and SATA-150 (maximum transfer rate: 1.5Gb/s).
It is composed of 4 ports.
8.5. USB3.0
This interface conforms to the standard of USB3.0 (maximum transfer rate: 5Gb/s).
It is composed of 4 ports.
8.6. USB2.0
This interface conforms to the standard of USB2.0 (maximum transfer rate: 480Mb/s).
It is composed of 7 ports.
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8.7. UART
This interface is composed of 2 ports.
They support up to 115,200 bps.
Though the signal level of this interface is 5 V according to COMe R2.1, 3.3 V signal version is also available.
Please ask our sales team.
8.8. LPC
This interface conforms to the standard of LPC 1.1.
8.9. SPI
This interface is composed of 1 ports.
The BIOS boot can be performed from ROM connected to this port.
8.10. SMBus (System Management Bus)
This interface is composed of 1 ports.
Each signal of SMBus is pulled up to 3.3 V on the CPU module.
8.11. I
2
C Bus
This interface is composed of 1 ports.
Each signal of I
2
C Bus is pulled up to 3.3 V on the CPU module.
The I
2
C bus controller is built in FPGA and accessed via the LPC bus.
8.12. GPIO
8.12.1. GPI
The CPU module supports four general purpose input signals (GPI).
Each GPI signal is connected to the GPIO pin of the processor. Table 6 shows the assignment of the GPI signals.
Moreover, GPI1 can be used as an NMI input.
GPI
COM Express pin name
Pin name of CPU
GPI0
GPIO35
GPI1
GPIO2
GPI2
GPIO3
GPI3
GPIO4
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8.12.2. GPO
The CPU module supports four general purpose output signals (GPO).
Each GPO signal is connected to the GPIO pin of the processor. Table 7 shows the assignment of the GPO
signals.
GPO
COM Express pin name
Pin name of CPU
GPO0
GPIO42
GPO1
GPIO9
GPO2
GPIO15
GPO3
GPIO7
8.13. External BIOS ROM Support
The CPU module supports the BIOS_DIS# [1-0] signal, and the BIOS boot destination can be selected. The
destination can be selected as shown in Table 8 below by processing the BIOS_DIS#[1-0] signals on a carrier
board.
BIOS source settings by BIOS_DIS#[1-0]
BIOS_DIS#[1-0]
BIOS(CS0) Boot Option
11b
SPI-FLASH on CPU-161-18 (Default)
10b
Reserved
01b
SPI-FLASH on a carrier board
00b
SPI-FLASH on CPU-161-18
8.14. Reset
The CPU module supports a SYS_RESET # signal and a CB_RESET # signal.
The CB_RESET # signal is a reset output signal to a carrier board. This reset signal can be used to reset a
device on the carrier board.
The SYS_RESET # signal is a reset button input signal from the carrier board.
8.15. Battery Low Alarm
The CPU module supports a BATLOW # signal.
The BATLOW # signal is an input signal from the carrier board.
8.16. Power Button
The CPU module supports a PWRBTN # signal.
The PWRBTN # signal is an input signal from the carrier board.
8.17. Power Good
The CPU module supports a PWR_OK signal.
The PWR_OK signal is an input signal from a carrier board.
The CPU module checks the assertion of a PWR_OK signal and then turns on the power to onboard devices.
8.18. Speaker
The CPU module supports a SPKR signal of the speaker output.
CPU-161-18 USER MANUAL FPGA
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9. FPGA
This chapter describes specifications on FPGA of the CPU module. FPGA is MachXO2 family of Lattice.
FPGA provides the following functions.
1) Control of power supply sequence and reset
2) I
2
C bus controller
(*1)
3) WDT function
4) LED control
5) LPC bus controller
*1 The I
2
C bus controller accesses via LPC.
9.1. GPIO Signals between FPGA and MCU
8 GPIO signals are communicated between FPGA and MCU. Table 9 lists signal names for each GPIO signal
and the usage in CPU-161-18.
GPIO signals between FPGA and MCU
Signal name
How to use
Input/output
C8051_GPIO40
(Blank)
Input
C8051_GPIO41
(Blank)
Input
C8051_GPIO42
(Blank)
Input
C8051_GPIO43
MCU_RST_OUT-
Input
C8051_GPIO44
SYS_PWROK
Output
C8051_GPIO45
(Blank)
Input
C8051_GPIO46
(Blank)
Output
C8051_GPIO47
SEDERR
Output
9.2. LPC Bus Controller
FPGA is equipped with the LPC bus controller, which responds to the reading and writing requests from CPU.
FPGA does not request for reading or writing to CPU. Table 10 shows specifications of the LPC bus controller.
Specification of LPC bus controller
Item
Details
Bus clock
33 MHz
Bus width
4 bit width
Used space
I/O space: 280h – 28Fh (16Byte)
Standard
Intel Low Pin Count (LPC) Interface Specification Rev 1.1
Cycle type
I/O Read
I/O Write
SERIRQ
Not used
LPC_DRQ[0: 1]#
Not used
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9.3. Address Map
FPGA uses the addresses of 0x280 – 0x28F in the I/O field. CPU accesses FPGA via the LPC bus. Table 11
describes the register map to FPGA. All registers are configured with an 8 bit width.
FPGA register map
Address
Register name
Use
R/W
0x280
I2C_1_CR
I
2
C controller
R/W
0x281
I2C_1_CMDR
R/W
0x282
I2C_1_BR0
R/W
0x283
I2C_1_BR1
R/W
0x284
I2C_1_TXDR
WO
0x285
I2C_1_SR
RO
0x286
I2C_1_GCDR
RO
0x287
I2C_1_RXDR
RO
0x288
Reserved
－
0x289
Reserved
0x28A
LED_CTL
Control of LED 1
WO
0x28B
WDT_CLR
WDT controller
WO
0x28C
WDT_CTL
R/W
0x28D
Reserved
－
－
0x28E
Reserved
0x28F
Reserved
9.3.1. I
2
C Controller
The I
2
C controller is the hard IP of Lattice.
The addresses of 0x40 – 0x47 of I
2
C Registers in Table 3 described in Page 9 of the Reference Guide (*1) are
mapped to the addresses of 0x280 – 0x287 in the I/O field of CPU. Table 12 shows the register map of the I
2
C
controller. For the I
2
C access, refer to Figure 6. I
2
C Master Read/Write Example (via WISHBONE) in Page 15 of
the Reference Guide.
I
2
C controller register map
Address
Register name
Register function
R/W
0x280
I2C_1_CR
Control Resistor
R/W
0x281
I2C_1_CMDR
Command Resistor
R/W
0x282
I2C_1_BR0
Clock Pre-scale Resistor
R/W
0x283
I2C_1_BR1
Clock Pre-scale Resistor
R/W
0x284
I2C_1_TXDR
Transmit Resistor
WO
0x285
I2C_1_SR
Status Resistor
RO
0x286
I2C_1_GCDR
General Call Resistor
RO
0x287
I2C_1_RXDR
Receive Data Resistor
RO
0x288
Reserved
－
－
0x289
Reserved
*1 Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide Document number: TN1246 ,
Rev2.3
http: //www.latticesemi.com/view_document?document_id=46300
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