Renesas RTKA788152DE0000BU combines essential features for an RS-485 transceiver. Utilizing a single 115kbps half-duplex transceiver, this device works ideally as a transmitter/receiver or loopback transmitter. It also has placeholders for fail-safe biasing resistors and a wide supply voltage range from 4.5V to 5.5V. Likewise, configuration jumpers for operating the transceiver are included.
Renesas RTKA788152DE0000BU combines essential features for an RS-485 transceiver. Utilizing a single 115kbps half-duplex transceiver, this device works ideally as a transmitter/receiver or loopback transmitter. It also has placeholders for fail-safe biasing resistors and a wide supply voltage range from 4.5V to 5.5V. Likewise, configuration jumpers for operating the transceiver are included.
Evaluation Board Manual
R15UZ0002EU0100 Rev.1.00 Page 1
Oct 6, 2021 © 2021 Renesas Electronics
RTKA788152DE0000BU, the RS-485 evaluation
board, allows you to evaluate the half-duplex
transceivers of the RAA78815x family of RS-485
transceivers.
Specifications
▪4.5V to 5.5V Supply Voltage
▪115kbps Half-Duplex Transceiver RAA788152
Features
▪Single 115kbps Half-Duplex Transceiver
▪RAA788152 (115kbps version currently installed)
can be unsoldered and replaced by RAA788155
(1Mbps version) or RAA788158 (20Mbps version)
▪Place holders for fail-safe biasing resistors
▪Configuration jumpers to operate the transceiver as
transmitter or receiver, or as a transmitter with
loopback
Figure 1. Block Diagram
A
B
C
1
2
4
3
5
6
8
7
GND
A/Y
VCC
B/Z
RO
DE
DI
RE
RO
/RE
DE
DI
V
CC
B/Z
A/Y
120Ω
R
2
V
CC
R
T
GND
SHIELD
B/Z
A/Y
R
3
C
4
DNP 0Ω
DNP
DNP
LK2
LK3
R
1
U1
A
B
C
D
LK1
V
CC
RO
/RE
DE
DI
VCC GND
10u
0.1u
0.01u
GND
V
CC
C
3
C
2
C
1
RTKA788152DE0000BU
R15UZ0002EU0100 Rev.1.00 Page 2
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
Contents
1. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Operational Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.1 Driver Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.2 Receiver Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Bus and Receiver Output Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.1 Set Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.2 Measurement Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
R15UZ0002EU0100 Rev.1.00 Page 3
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
1. Functional Description
1.1 Operational Characteristics
1.1.1 Driver Operation
A logic high at the driver enable pin (DE) activates the driver and causes the differential driver outputs (Y and Z) to
follow the logic states at the data input (DI). A logic high at DI causes Y to turn high and Z to turn low. In this case,
the differential output voltage, defined as VOD = VY – VZ, is positive. A logic low at DI reverses the output states
reverse, turning Y low and Z high, therefore, making VOD negative. A logic low at DE disables the driver, making Y
and Z high-impedance. In this condition, the logic state at DI is irrelevant. To ensure the driver remains disabled
after device power-up, Renesas recommends connecting DE through a 1kΩ to 10kΩ pull-down resistor to ground.
1.1.2 Receiver Operation
A logic low at the receiver enable pin (RE) activates the receiver and causes its output (RO) to follow the bus
voltage at the differential receiver inputs (A and B); the bus voltage is defined as VAB = VA - VB. For VAB ≥-0.05V,
RO turns high, and for VAB ≤ -0.2V, RO turns low. For input voltages between -50mV and -200mV, the state of RO
is undetermined, and therefore can be high or low. A logic high at RE disables the receiver, making RO high-
impedance. In this condition, the polarity and magnitude of the input voltage is irrelevant. To ensure the receiver
output remains high when the receiver is disabled, Renesas recommends connecting RO, using a 1kΩ to 10kΩ
pull-up resistor to VCC. To enable the receiver to immediately monitor the bus traffic after device power- up,
connect RE through a 1kΩ to 10kΩ pull-down resistor to ground.
Figure 2. Typical Operating Circuits of Half-Duplex and Full-Duplex Transceivers
Table 1. Driver Truth Table
Inputs Outputs
FunctionRE DE DI Y Z
X H H H L Actively drives bus high
X H L L H Actively drives bus low
L L X Z Z Driver disabled, outputs high-impedance
H L X Z Z Shutdown mode: driver and receiver disabled for more than 600ns
A
B
RO
DE
DI
R
D
RT
GND
VCC
RE
5V
10k
10k 10k
RL78
MCU Y
Z
100n
RB
(optional)
RB
(optional)
A/Y
B/Z
RO
DE
DI
R
D
RT
GND
VCC
RE
5V
10k
10k 10k
RL78
MCU
100n
RB
(optional)
RB
(optional)
R15UZ0002EU0100 Rev.1.00 Page 4
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
1.2 Bus and Receiver Output Voltages
1.2.1 Set Up
Before connecting measurement equipment, set up the evaluation board and make sure to remove the JP1
socket, which is a jumper connection between two output channels A/Y and B/Z. Removal of JP1 socket allows for
measurement of output voltage across driver outputs. Follow the schematic diagram to enable driver by placing
sockets to connect DE_J positions 1 and 2. Enable the receiver by placing the socket to connect RE#_J positions
7 and 8. Placing a socket between positions 1 and 2 connects the Driver Enable function to VCC and activates the
driver. Otherwise, placing a socket between positions 7 and 8 connects the Receiver Enable function to ground,
and because this function is inverted, the receiver is activated. To ensure there is voltage across the bus, attach
the load resistor of 60Ω over the A/Y and B/Z channels. Without this resistive load, the bus is an open circuit.
Therefore, no voltage reading would be across the bus.
Attach VCC to the power supply and set the voltage to 5VDC. Attach the Oscilloscope channel 1 and channel 2
probes to the A/Y and B/Z channels accordingly for bus voltage reading. For channel 3, attach to RO for receiver
output voltage reading. Connect the pulse generator to driver input (DI) and set it up for square wave function.
Table 2. Receiver Truth Table
Inputs Outputs
FunctionRE DE A-B RO
LXV
AB ≥ -0.05V H RO is data-driven high
L X -0.05 > VAB > -0.2V Undetermined Actively drives bus low
LX V
AB ≤ -0.02 L RO is data-driven low
L X Inputs Open/Shorted H RO is failsafe-high
H H X Z Receiver disabled, RO is high-impedance
H L X Z Shutdown mode: driver and receiver disabled for more than 600ns
Figure 3. Setup for Bus and Receiver Output Voltage Measurement with Oscilloscope, Power Supply, and Function
Generator
‐25V Track Dis p lay Limit
Recall StoreOutput On/OffError I/OConfig
SELECT
Local CalibrateSecure
FUN CTI O N
><
Voltage
Current
ADJUST
Power
On
Off
6V
±25V
COM
+
±240VDC MAXTO
± 25V
0-6V,5A/0-±25V,1A
Tri ple O utput DC Power Supply
E3631A
+25V+6V
+
7
3
9
46
21
5
8
.0 +/‐
Menu
AFG
Acquire
ForceTrig
Freq/Span
Ampl
Markers
BW
RF
R
B1
B2
B3
M
Run/StopSin gle
Bksp
Enter
SingleMeasure
Select Fine
AutoS et
Search
Set/C lear
Level
PushtoSetto 50%
Position
PushtoCenter
Scale
Mark
Mu lt ip urpo seb
Mu lt ip u rpo sea
Math
Ref
Bus
Position
Scale
Menu
Intensi tyCursors
1MΩ,13pF≤300V RMS CATII;50Ω,±5VRMS
TriggerHori zontal
WaveInspector
Vert ical Frequency
50Ω+30dBm (1W)max±40VDCmax
1 2 3 4
RF
RF
Save Menu DefaultSetup
MenuOff
Util it y D15‐D0
Save/Recall
Pan&Zoom
1 2 3 4
MDO4104CMix e d Do m ain Os cilloscope
6GHz1GHz5G S / s
LCL
ON
OFF
‐10V +10V
EXTINPUT
±20V
LINE LEVEL
CT RLINPUT
±20V
TRI GINPUTOUTPUT
MAN 1P U LSE SET ST O/RCL LIMIT COMPL DISABLE
RMT
ADS
SRQ
NORM
TR I G
GATE
E.WI D E.B UR
PERC
DELC
WID C
HILC
BUR
PE R
DBL
DEL
DTY
WID LEE TRE HILLOL
VERNIER RANGE
STO RCL
ms
µs
ns
%
V
MODE CTRL
8112APU L SE GENERAT OR50MHz
HEWL ETTPACKA RD
R15UZ0002EU0100 Rev.1.00 Page 5
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
1.2.2 Measurement Graphs
Figure 4. Driver Input Voltage vs Time
Figure 5. A/Y Channel Output Voltage vs Time
Figure 6. B/Z Channel Output Voltage vs Time
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
R15UZ0002EU0100 Rev.1.00 Page 6
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
Figure 7. Bus Output Voltages vs Time
Figure 8. Receiver Output Voltage vs Time
Figure 9. Driver Input Voltage vs Receiver Output Voltage
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
R15UZ0002EU0100 Rev.1.00 Page 7
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
2. Board Design
Figure 10. Bus Output Voltage vs Receiver Output Voltage
Figure 11. RTKA788152DE0000BU Evaluation Board (Top)
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0
5.0
Voltage (V)
Time (µs)
R15UZ0002EU0100 Rev.1.00 Page 8
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
2.1 Schematic Diagrams
2.2 Bill of Materials
Figure 12. RTKA788152DE0000BU Schematic
Qty
Reference
Designator Description Manufacturer
Manufacturer
Part Number
1 POWER 2 Position at 100 Mil Micro-Pitch Terminal
Block
Phoenix 1725656
1 OUT 4 Position at 100 Mil Micro-Pitch Terminal
Block
Phoenix 1725672
1 IN In-line 5 pins x 0.1 inch 6A Terminal Block Phoenix 1725685
1 VCC Miniature Red Test Point 0.100 Pad 0.040
Thole
Keystone 5000
1 GND Miniature Black Test Point 0.100 Pad 0.040
Thole
Keystone 5001
4 DE, DI, RO,
RE#
Miniature Orange Test Point 0.100 Pad 0.040
Thole
Keystone 5003
2 A/Y, B/Z Miniature Yellow Test Point 0.100 Pad 0.040
Thole
Keystone 5004
1 DE_J Dual Row Vertical PCB Connector Molex 90151-3X06
1 RE#_J Dual Row Vertical PCB Connector Molex 90151-3X08
DE_J
3
RE
RO
DE
DI
B/Z
VCC
A/Y
GND
U1
RAA7881522GSP#
1
2
3
4 5
6
7
8
B/Z
IN 5
RE#_J 8
RT
121
DE_J
1
VCC
R3
0
IN 4
RE#_J 6
JP1
1 2
RE#_J
7
POWER 2
OUT
4
IN 3
RE#_J 4
R1
DNP
RE#_J
5
OUT
3
IN 2
RE#_J 2
POWER
1
RE#_J
3
C3
0.01UF
OUT
2
IN 1
DI
C4
OPEN
RE#_J
1
C2
0.1UF
OUT
1
DE
GND
DE_J 6
C1
10UF
RE#
DE_J 4
DE_J
5
RO
A/Y
DE_J 2
R2
DNP
UNNAMED _1_HEADERS_I31_IN1
UNNAMED _1_HEADERS_I34_IN1
UNNAMED _1_HEADERS_I37_IN1
UNNAMED _1_HEADERS_I41_IN1
UNNAMED_1_JUMPER2_I17_IN1
UNNAMED_1_JUMPER2_I17_IN2
UNNAMED_1_RAA788152_I1_PIN1
UNNAMED_1_RAA788152_I1_PIN4
UNNAMED_1_SMCAP_I16_A
UNNAMED _1_SMCAP_I2_B
UNNAMED_1_SMRES_I13_B
R15UZ0002EU0100 Rev.1.00 Page 9
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
2.3 Board Layout
1 C1 Ceramic CAP Murata GRM21BR61E106MA73
1 C3 Multilayer Cap Various Generic
1 C2 Multilayer Cap Various Generic
1 C4 Multilayer Cap Various Generic
2 R1, R2 Metal Film Chip Resistor (Do Not Populate) Various Generic
1 R3 Thick Film Chip Resistor Various Generic
1 RT Thick Film Chip Resistor Various Generic
1 JP1 Two Pin Jumper Various Generic
1 U1 RS-485 Transceiver Renesas Electronics RAA7881522GSP#
Figure 13. Top Layer Figure 14. Bottom Layer
Figure 15. Top Silkscreen
Qty
Reference
Designator Description Manufacturer
Manufacturer
Part Number
R15UZ0002EU0100 Rev.1.00 Page 10
Oct 6, 2021
RTKA788152DE0000BU Evaluation Board Manual
3. Ordering Information
4. Revision History
Part Number Description
RTKA788152DE0000BU RAA788152 Evaluation Board
Revision Date Description
1.00 Oct 6, 2021 Initial release
Corporate Headquarters
TOYOSU FORESIA, 3-2-24 Toyosu,
Koto-ku, Tokyo 135-0061, Japan
www.renesas.com
Contact Information
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up-to-date version of a document, or your nearest sales
office, please visit:
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Renesas and the Renesas logo are trademarks of Renesas
Electronics Corporation. All trademarks and registered
trademarks are the property of their respective owners.
IMPORTANT NOTICE AND DISCLAIMER
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SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING
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INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
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These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible
for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3)
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expands or otherwise alters any applicable warranties or warranty disclaimers for these products.
(Rev.1.0 Mar 2020)
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Renesas RTKA788152DE0000BU combines essential features for an RS-485 transceiver. Utilizing a single 115kbps half-duplex transceiver, this device works ideally as a transmitter/receiver or loopback transmitter. It also has placeholders for fail-safe biasing resistors and a wide supply voltage range from 4.5V to 5.5V. Likewise, configuration jumpers for operating the transceiver are included.
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