Adlink PCI-7300A User manual

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User manual

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Advance Technologies; Automate the World.
Manual Rev. 2.01
Revision Date: December 21, 2006
Part No: 50-11106-101
cPCI-7300A/PCI-7300A
80MB Ultra-High Speed 32-CH
Digital I/O Boards
User’s Manual
Copyright 2006 ADLINK TECHNOLOGY INC.
All Rights Reserved.
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, spe-
cial, incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of
the possibility of such damages.
This document contains proprietary information protected by copy-
right. All rights are reserved. No part of this manual may be repro-
duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Trademarks
NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK
TECHNOLOGY INC.
Product names mentioned herein are used for identification pur-
poses only and may be trademarks and/or registered trademarks
of their respective companies.
Getting Service from ADLINK
Customer Satisfaction is top priority for ADLINK Technology Inc.
Please contact us should you require any service or assistance.
ADLINK TECHNOLOGY INC.
Web Site: http://www.adlinktech.com
Sales & Service: [email protected]
TEL: +886-2-82265877
FAX: +886-2-82265717
Address: 9F, No. 166, Jian Yi Road, Chungho City,
Taipei, 235 Taiwan
Please email or FAX this completed service form for prompt and
satisfactory service.
Company Information
Company/Organization
Contact Person
E-mail Address
Address
Country
TEL FAX:
Web Site
Product Information
Product Model
Environment
OS:
M/B: CPU:
Chipset: BIOS:
Please give a detailed description of the problem(s):
Table of Contents i
Table of Contents
Table of Contents..................................................................... i
List of Tables......................................................................... vii
List of Figures ...................................................................... viii
1 Introduction ........................................................................ 1
1.1 Applications ......................................................................... 2
1.2 Features............................................................................... 2
1.3 Specifications....................................................................... 3
1.4 Software Support ................................................................. 5
Programming Library ...................................................... 5
DAQ-LVIEW PnP: LabVIEW® Driver ............................. 6
PCIS-VEE: HP-VEE Driver ............................................. 6
DAQBenchTM: ActiveX Controls .................................... 6
2 Installation .......................................................................... 7
2.1 What You Have.................................................................... 7
2.2 Unpacking............................................................................ 8
2.3 Device Installation for Windows Systems ............................ 8
2.4 PCI-7300A's Layout ............................................................. 9
2.5 Hardware Installation Outline............................................. 11
2.6 Connector Pin Assignment ................................................ 12
2.7 Wiring and Termination..................................................... 15
2.8 Termination Board Supporting........................................... 16
Connect with DIN-100S ................................................ 16
Connect with DIN-502S ................................................ 16
3 Registers........................................................................... 17
3.1 I/O Port Base Address ....................................................... 18
3.2 DI_CSR: DI Control & Status Register .............................. 20
3.3 DO_CSR: DO Control & Status Register........................... 22
3.4 Auxiliary Digital I/O Register .............................................. 24
3.5 INT_CSR: Interrupt Control and Status Register............... 25
3.6 DI_FIFO: DI FIFO direct access port ................................. 26
3.7 DO_FIFO: DO external data FIFO direct access port........ 27
3.8 FIFO_CR: FIFO almost empty/full register ........................ 28
3.9 POL_CNTRL: Control Signal Polarity Control Register ..... 29
ii Table of Contents
3.10 .............................. PLX PCI-9080 DMA Control Registers 30
4 Operation Theory .............................................................. 31
4.1 I/O Configuration................................................................ 31
4.2 Block Diagram.................................................................... 32
4.3 Digital I/O Data Flow .......................................................... 33
4.4 Input FIFO and Output FIFO.............................................. 34
4.5 Bus-mastering DMA........................................................... 35
4.6 Scatter/gather DMA ........................................................... 37
4.7 Clocking Mode ................................................................... 38
4.8 Starting Mode..................................................................... 40
4.9 Active Terminator............................................................... 40
4.10 Digital Input Operation Mode ............................................. 41
Digital Input DMA in Internal Clock Mode ..................... 41
Digital Input DMA in External Clock Mode .................... 43
Digital Input DMA in Handshaking Mode ...................... 45
Continuous Digital Input ................................................ 47
4.11 Digital Output Operation Mode .......................................... 49
Digital Output DMA in Internal Clock Mode .................. 49
Digital Output DMA in Handshaking Mode ................... 50
Digital Output DMA in Burst Handshaking Mode .......... 52
Pattern Generator ......................................................... 55
4.12 Auxiliary DIO ...................................................................... 56
5 C/C++ Libraries ................................................................. 57
5.1 Libraries Installation ........................................................... 57
5.2 Programming Guide........................................................... 58
Naming Convention ...................................................... 58
Data Types ................................................................... 58
5.3 _7300_Initial ...................................................................... 59
@ Description ............................................................... 59
@ Syntax ...................................................................... 59
@ Argument .................................................................. 59
@ Return Code ............................................................. 60
5.4 _7300_Close...................................................................... 61
@ Description ............................................................... 61
@ Syntax ...................................................................... 61
@ Argument .................................................................. 61
@ Return Code ............................................................. 61
5.5 _7300_Configure ............................................................... 62
Table of Contents iii
@ Description ............................................................... 62
@ Syntax ...................................................................... 62
@ Argument ................................................................. 62
@ Return Code ............................................................. 63
5.6 _7300_DI_Mode ................................................................ 64
@ Description ............................................................... 64
@ Syntax ...................................................................... 64
@ Argument ................................................................. 64
@ Return Code ............................................................. 64
5.7 _7300_DO_Mode .............................................................. 65
@ Description ............................................................... 65
@ Syntax ...................................................................... 65
@ Argument ................................................................. 65
@ Return Code ............................................................. 66
5.8 _7300_AUX_DI.................................................................. 67
@ Description ............................................................... 67
@ Syntax ...................................................................... 67
@ Argument ................................................................. 67
@ Return Code ............................................................. 67
5.9 _7300_AUX_DI_Channel .................................................. 68
@ Description ............................................................... 68
@ Syntax ...................................................................... 68
@ Argument ................................................................. 68
@ Return Code ............................................................. 68
5.10 _7300_AUX_DO ................................................................ 69
@ Description ............................................................... 69
@ Syntax ...................................................................... 69
@ Argument ................................................................. 69
@ Return Code ............................................................. 69
5.11 _7300_AUX_DO_Channel................................................. 70
@ Description ............................................................... 70
@ Syntax ...................................................................... 70
@ Argument ................................................................. 70
@ Return Code ............................................................. 70
5.12 _7300_Alloc_DMA_Mem ................................................... 71
@ Description ............................................................... 71
@ Syntax ...................................................................... 71
@ Argument ................................................................. 71
@ Return Code ............................................................. 71
5.13 _7300_Free_DMA_Mem ................................................... 72
iv Table of Contents
@ Description ............................................................... 72
@ Syntax ...................................................................... 72
@ Argument .................................................................. 72
@ Return Code ............................................................. 72
5.14 _7300_DI_DMA_Start........................................................ 73
@ Description ............................................................... 73
@ Syntax ...................................................................... 74
@ Argument .................................................................. 75
@ Return Code ............................................................. 75
5.15 _7300_DI_DMA_Status ..................................................... 77
@ Description ............................................................... 77
@ Syntax ...................................................................... 77
@ Argument .................................................................. 77
5.16 _7300_DI_DMA_Abort....................................................... 78
@ Description ............................................................... 78
@ Syntax ...................................................................... 78
@ Argument .................................................................. 78
@ Return Code ............................................................. 78
5.17 _7300_GetOverrunStatus .................................................. 79
@ Description ............................................................... 79
@ Syntax ...................................................................... 79
@ Argument .................................................................. 79
5.18 _7300_DO_DMA_Start ...................................................... 80
@ Description ............................................................... 80
@ Syntax ...................................................................... 80
@ Argument .................................................................. 80
@ Return Code ............................................................. 81
5.19 _7300_DO_DMA_Status ................................................... 82
@ Description ............................................................... 82
@ Syntax ...................................................................... 82
@ Argument .................................................................. 82
@ Return Code ............................................................. 82
5.20 _7300_DO_DMA_Abort ..................................................... 83
@ Description ............................................................... 83
@ Syntax ...................................................................... 83
@ Argument .................................................................. 83
@ Return Code ............................................................. 83
5.21 _7300_DO_PG_Start......................................................... 84
@ Description ............................................................... 84
@ Syntax ...................................................................... 84
Table of Contents v
@ Argument ................................................................. 84
@ Return Code ............................................................. 84
5.22 _7300_DO_PG_Stop......................................................... 86
@ Description ............................................................... 86
@ Syntax ...................................................................... 86
@ Argument ................................................................. 86
@ Return Code ............................................................. 86
5.23 _7300_DI_Timer ................................................................ 87
@ Description ............................................................... 87
@ Syntax ...................................................................... 87
@ Argument ................................................................. 87
@ Return Code ............................................................. 87
5.24 _7300_DO_Timer .............................................................. 88
@ Description ............................................................... 88
@ Syntax ...................................................................... 88
@ Argument ................................................................. 88
@ Return Code ............................................................. 88
5.25 _7300_Int_Timer................................................................ 89
@ Description ............................................................... 89
@ Syntax ...................................................................... 89
@ Argument ................................................................. 89
@ Return Code ............................................................. 89
5.26 _7300_Get_Sample........................................................... 90
@ Description ............................................................... 90
@ Syntax ...................................................................... 90
@ Argument ................................................................. 90
@ Return Code ............................................................. 90
5.27 _7300_Set_Sample ........................................................... 91
@ Description ............................................................... 91
@ Syntax ...................................................................... 91
5.28 _7300_GetUnderrunStatus................................................ 92
@ Description ............................................................... 92
@ Syntax ...................................................................... 92
@ Argument ................................................................. 92
@ Return Code ............................................................. 92
Appendix................................................................................ 93
The Intel (NEC) 8254 .................................................... 93
The Control Byte ........................................................... 93
Mode Definition ............................................................. 95
vi Table of Contents
Warranty Policy ..................................................................... 99
List of Tables vii
List of Tables
Table 2-1: Connector Pin Assignment ..................................... 12
Table 3-1: I/O Port Base Address ............................................ 18
Table 4-1: I/O Configuration .................................................... 31
Table 5-1: Data Types ............................................................. 58
viii List of Figures
List of Figures
Figure 2-1: PCI-7300A Layout Diagram....................................... 9
Figure 2-2: cPCI-7300A Layout Diagram ................................... 10
Figure 2-3: CN1 Pin Assignment................................................ 14
Figure 4-1: Block diagram .......................................................... 32
Figure 4-2: Data flow of digital input........................................... 33
Figure 4-3: Data flow of digital output ........................................ 33
Figure 4-4: Maximum data throughput ....................................... 35
Figure 4-5: Scatter/gather DMA for digital output....................... 37
Figure 4-6: Timer configuration .................................................. 38
Figure 4-7: DIREQ as input data strobe (Rising Edge Active) ... 44
Figure 4-8: DIREQ as input data strobe (Falling Edge Active)... 45
Figure 4-9: DIREQ & DIACK Handshaking................................ 47
Figure 4-10: DOREQ as output data strobe................................. 50
Figure 4-11: DOREQ & DOACK Handshaking ............................ 52
Introduction 1
1 Introduction
The cPCI/PCI-7300A is cPCI/PCI form factor ultra-high speed dig-
ital I/O card, it consists of 32 digital input or output channel. High
performance designs and the state-of-the-art technology make
this card to be ideal for high speed digital input and output applica-
tions.
The cPCI/PCI-7300A performs high-speed data transfers using
bus mastering DMA and scatter/gather via 32-bit PCI bus architec-
ture. The maximum data transfer rates can be up to 80MB per
second. It is very suitable for interface between high speed periph-
erals and your computer system.
The cPCI/PCI-7300A is configured as two ports, PORTA and
PORTB, each port controls 16 digital I/O lines. The I/O can config-
ure as either input or output, and 8-bit or 16-bit. According to out-
side device environment, users can configure cPCI/PCI-7300A to
meet all high speed digital I/O data transfer.
There are 4 different digital I/O operation modes are supported:
1. Internal Clock: the digital input and output operations are
paced by internal clock and transferred by bus mastering
DMA.
2. External Clock: the digital input operation is paced by
external strobe signal ( DIREQ ) and transferred by bus
mastering DMA.
3. Handshaking: through REQ signal and ACK signal, the
digital I/O data can have simple handshaking data trans-
fer.
4. Pattern Generation: You can output a digital pattern
repeatedly at a predetermined rate. The transfer rate is
controlled by internal timer.
2Introduction
1.1 Applications
X Interface to high-speed peripherals
X High-speed data transfers from other computers
X Automated test equipment (ATE)
X Electronic and logic testing
X Interface to external high-speed A/D and D/A converter
X Digital pattern generator
X Waveform and pulse generation
X Parallel digital communication
1.2 Features
The PCI-7300A Ultra-High Speed DIO card provides the following
advanced features:
X 32 digital input/output channels
X Extra 4-bit TTL digital input and output channels
X Transfer up to 80M Bytes per second
X SCSI active terminator for high speed and long distance
data transfer
X 32-bit PCI bus
X Plug and Play
X Scatter/gatter DMA
X On-board internal clock generator
X Internal timer/external clock controls input sampling rate
X Internal timer control digital output rate
X ACK and REQ for handshaking
X TRIG signal controls start of data acquisition/pattern gener-
ation
X On-board 64KB FIFO
X 100-pin SCSI style connector
Introduction 3
1.3 Specifications
Digital I/O (DIO)
X Numbers of Channel: 32 TTL compatible inputs and/or out-
puts
X Device: IDT 74FCT373
X I/O Configurations:
Z 16 DI & 16 DO
Z 32 DI
Z 32 DO
Input Voltage:
X Low: Min. 0V; Max. 0.8V
X High: Min. +2.0V
Input Load:
X Terminator OFF:
Z Low: +0.5V @ ±20 mA
Z High: +2.7V @ ±1 mA max.
X Terminator ON:
Z Termination resistor: 110 Ohms
Z Termination voltage: 2.9V
Z Low: +0.5V @ ±22.4mA
Z High: +2.7V @ ±1mA max.
Output Voltage:
X Low: Min. 0V; Max. 0.5V
X High: Min. +2.7V
Driving Capacity:
X Low: Max. +0.5V at 48mA (Sink)
X High: Min. 2.4V at -8 mA (Source)
Hysteresis: 500mV
Transfer Characteristic
X Mode: Bus Mastering DMA with Scatter/Gather
X Data Transfers: 8/16/32-bit input or output (programmable)
4Introduction
DMA Transfer count:
X No limitation for chaining mode (scatter/gather) DMA
Max. Transfer rate:
X DO: 80M Bytes/sec: 32-bit output @ 20 MHz
X DI: 80M Bytes/sec: 32-bit input @ 20 MHz
Programmable Counter:
X Device: 82C54-10
X Digital Input Pacer: 20MHz, 10MHz, or clock output of Timer
#0
X Digital Output Pacer: 20MHz, 10MHz, or clock output of
Timer #1
General Specifications
X Connector: one 100-pin male SCSI-II style cable connector
X Operating Temperature: 0? C ~ 60?C
X Storage Temperature: -20? C ~ 80?C
X Humidity: 5 ~ 95%, non-condensing
X Dimension: Compact size only 179mm(L) X 102mm(H)
X Power Consumption:
Z +5 V @ 830 mA max. with on-board terminator off, or
Z +5 V @ 1.0A max. with on-board terminator on
Introduction 5
1.4 Software Support
ADLINK provides versatile software drivers and packages for
users’ different approach to built-up a system. We not only pro-
vide programming library such as DLL for many Windows sys-
tems, but also provide drivers for software packages such as
LabVIEW®, HP VEETM, DASYLabTM, and so on.
All the software options are included in the ADLINK CD. The non-
free software drivers are protected with serial licensed code.
Without the software serial number, you can still install them and
run the demo version for two hours for demonstration purpose.
Please contact with your dealer to purchase the formal license
serial code.
Programming Library
For customers who are writing their own programs, we provide
function libraries for many different operating systems, including:
X DOS Library: Borland C/C++ and Microsoft C++, the func-
tions descriptions are included in this user’s guide.
X Windows 95 DLL: For VB, VC++, Delphi, BC5, the functions
descriptions are included in this user’s guide.
X PCIS-DASK: Include device drivers and DLL for Windows
98, Windows NT and Windows 2000. DLL is binary compat-
ible across Windows 98, Windows NT and Windows 2000.
That means all applications developed with PCIS-DASK are
compatible across Windows 98, Windows NT and Windows
2000. The developing environment can be VB, VC++, Del-
phi, BC5, or any Windows programming language that
allows calls to a DLL. The user’s guide and function refer-
ence manual of PCIS-DASK are in the CD. Please refer
the PDF manual files under \\Manual\Software Pack-
age\PCIS-DASK.
The above software drivers are shipped with the board. Please
refer to the “Software Installation Guide” to install these drivers.
6Introduction
DAQ-LVIEW PnP: LabVIEW® Driver
DAQ-LVIEW PnP contains the VIs, which are used to interface
with NI’s LabVIEW® software package. The DAQ-LVIEW PnP
supports Windows 2000/XP. The LabVIEW® drivers are free
shipped with the board. You can install and use them without
license. For detail information about DAQ-LVIEW PnP, please
refer to the user’s guide in the CD.
(\\Manual\Software Package\DAQ-LVIEW PnP)
PCIS-VEE: HP-VEE Driver
The PCIS-VEE includes the user objects, which are used to inter-
face with HP VEE software package. PCIS-VEE supports Win-
dows 95/98/NT. The HP-VEE drivers are free shipped with the
board. You can install and use them without license. For detail
information about PCIS-VEE, please refer to the user’s guide in
the CD.
(\\Manual\Software Package\PCIS-VEE)
DAQBench
TM
: ActiveX Controls
We suggest the customers who are familiar with ActiveX controls
and VB/VC++ programming use the DAQBenchTM ActiveX Con-
trol components library for developing applications. The
DAQBenchTM is designed under Windows NT/98. For more
detailed information about DAQBench, please refer to the user’s
guide in the CD.
(\\Manual\Software Package\DAQBench Evaluation)
Installation 7
2 Installation
This chapter describes how to install the cPCI/PCI-7300A. At first,
the contents in the package and unpacking information that you
should be careful are described. Because the PCI-7300A is fol-
lowing the PCI design philosophy, it is no more jumpers and DIP
switches setting for configuration. The Interrupt and I/O port
address are the variables associated with automatic configuration,
the resource allocation is managed by the system BIOS. Upon
system power-on, the internal configuration registers on the board
interact with the BIOS.
2.1 What You Have
In addition to this User's Manual, the package includes the follow-
ing items:
X cPCI/PCI-7300A 80MB Ultra-High Speed 32-CH Digital I/O
Card
X ADLINK All-in-one CD
X Software Installation Guide
If any of these items is missing or damaged, contact the dealer
from whom you purchased the product. Save the shipping materi-
als and carton in case you want to ship or store the product in the
future.
8Installation
2.2 Unpacking
Your cPCI/PCI-7300A card contains sensitive electronic compo-
nents that can be easily damaged by static electricity.
The card should be placed on a grounded anti-static mat. The
operator should be wearing an anti-static wristband, grounded at
the same point as the anti-static mat.
Inspect the card module carton for obvious damage. Shipping and
handling may cause damage to your module. Be sure there are no
shipping and handling damages on the module before processing.
After opening the card module carton, extract the system module
and place it only on a grounded anti-static surface component side
up.
Again inspect the module for damage. Press down on all the sock-
eted IC's to make sure that they are properly seated. Do this only
with the module place on a firm flat surface.
Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN
DAMAGED.
You are now ready to install your cPCI/PCI-7300A.
2.3 Device Installation for Windows Systems
Once Windows 95/98/2000 has started, the Plug and Play function
of Windows system will find the new NuDAQ/NuIPC cards. If this
is the first time to install NuDAQ/NuIPC cards in your Windows
system, you will be informed to input the device information
source. Please refer to the “Software Installation Guide” for the
steps of installing the device.
\\Manual\Software Package\SoftwareInstallationGuide
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Adlink PCI-7300A User manual

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