Humandata ACM-021-55C8 User manual

HuMANDATA LTD.

Cyclone III FPGA Board

ACM-021 Series

User’s Manual

Ver.

1

.

2

Table of Contents

Table of ContentsTable of Contents

Table of Contents





 Revision History

Revision HistoryRevision History

Revision History

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................................................................

.................................

..

.

1

11

1





 Introduction

IntroductionIntroduction

Introduction

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................................................................

........................................

................

........

1

11

1

1. Unused Pins [IMPORTANT]

1. Unused Pins [IMPORTANT]1. Unused Pins [IMPORTANT]

1. Unused Pins [IMPORTANT]

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................................................................

.................................................

..................................

.................

2

22

2

2. Specifications

2. Specifications2. Specifications

2. Specifications

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................................................................

.........................................

..................

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3

33

3

3. Overview

3. Overview3. Overview

3. Overview

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................................................................

................................................

................................

................

4

44

4

3.1. Name of Parts ...................................................................................................... 4

3.2. Block Diagram ..................................................................................................... 5

3.3. Power Supply ....................................................................................................... 5

3.4. JTAG Connector .................................................................................................. 6

4. Configuration Switch

4. Configuration Switch4. Configuration Switch

4. Configuration Switch

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................................................................

.............................................................

..........................................................

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7

77

7

5. FPGA Configuration

5. FPGA Configuration5. FPGA Configuration

5. FPGA Configuration

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............................................................

..............................

8

88

8

6. Configuration Device Programming

6. Configuration Device Programming6. Configuration Device Programming

6. Configuration Device Programming

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......................................

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......

8

88

8

7. Additional Documentation and User Support

7. Additional Documentation and User Support7. Additional Documentation and User Support

7. Additional Documentation and User Support

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.......................................................

..............................................

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9

99

9

Precautions

Do Not

1. This product uses ordinary off-the-shelf electronic components, and is therefore inappropriate for use in

applications that require special quality or reliability and are expected to protect human lives or prevent

accidents, such as safety mechanisms in fields including space, aeronautics, medicine, and nuclear

power.

2. Do not be used underwater or in high-humidity environments.

3. Do not be used in the presence of corrosive gases, combustible gases, or other flammable gases.

4. Do not turn on power when circuit board surface is in contact with other metal.

5. Do not apply voltage higher than rated voltage.

Attention

6. This manual may be revised in the future without notice owing to improvements.

7. All efforts have been made to produce the best manual possible, but if users notice an error or other

problem, we ask that they notify us.

8. Item 7 notwithstanding, HuMANDATA cannot be held liable for the consequences arising from use of

this product.

9. HuMANDATA cannot be held liable for consequences arising from using this product in a way different

from the uses described herein, or from uses not shown herein.

10. This manual, circuit diagrams, sample circuits, and other content may not be copied, reproduced, or

distributed without permission.

11. If the product emits smoke, catches fire, or becomes unusually hot, cut the power immediately.

12. Be careful of static electricity.

13. This product may be subject to the export restrictions of Japan, the United States, or other countries.

Purchasers are responsible for properly observing export restrictions.

14. HuMANDATA firmly refuses to export (including reexporting) products to countries or regions subject to

export restrictions.

Product Warranty and Scope of Support

1. HuMANDATA guarantees that its products can be assembled as shown in published circuit diagrams and other design documents.

There may be differences between actual components or their prescribed quantities and model numbers and those shown in circuit

diagrams.

2. Except for the guarantee in item 1, above, no guarantees whatsoever are made. When assembling the product as shown in a circuit

diagram is impossible, and the problem can be solved by revising the diagram, HuMANDATA will revise the diagram. When a

problem can be solved only by replacing components or modifying the product, HuMANDATA will take back the product to replace it

with a properly functioning product.

3. If the problem is minor, HuMANDATA will sometimes describe how to make the revision or modification, and ask the customer to

solve the problem.

4. HuMANDATA will determine how to honor the warranty, as through repair, replacement, return, or other action. The customer cannot

specify what action to take.

5. FPGAs and other components used in products sometimes have characteristic defects. Returns and replacements are not possible

even if such defects are discovered, whether before or after purchase.

6. HuMANDATA shall not be obligated to inform customers about defects in the main components used in products.

7. HuMANDATA shall not be obligated to provide support for products, or to provide support for the software of other companies

needed to use HuMANDATA products.

8. Published documentation shall be limited to that published by HuMANDATA at the time of product purchase, and HuMANDATA shall

not be obligated to provide any other documentation.

9. When repairs or replacements are provided under warranty in Japan, purchaser shall pay shipping charges for shipping to

HuMANDATA, and HuMANDATA shall pay shipping charges for shipping to purchaser.

10. When shipping from outside of Japan, purchaser shall pay all expenses including shipping charges and taxes.

11. Under whatever circumstances, HuMANDATA shall provide support for its products for a maximum of one year after shipping from

factory.

12. The Warranty is not applicable and support ends in the event of fire, storm and flood damage, earthquakes, lightning strikes, and

other natural disasters, as well as conflict or other occurrences.

13. Purchaser is assumed to have read and understood all the above when purchasing a HuMANDATA product.

Limitation of Liability

1. Purchasers assume all liability associated with the use of this product.

2. HuMANDATA assumes no liability whatsoever for any direct, indirect, special, incidental, or consequential damages arising from the

use of this product, even if HuMANDATA has been advised of the possibility of such damage, whether legal or in tort.

3. At the time this product is purchased, items 1 and 2 above shall be deemed to have been confirmed by purchaser.

Trademarks and Other Considerations

1. This manual uses various companies’ trademarks in places.

2. HuMANDATA is this company’s registered trademark.

HuMANDATA’s Philosophy

1. HuMANDATA endeavors to raise product quality. We continually make detailed improvements and adjustments that are not shown

in circuit diagrams.

2. HuMANDATA actively publishes, on the Web and in other ways, information considered useful to customers. Examples would be

how to use FPGAs and how to use development tools.

3. HuMANDATA makes efforts for the long-term provision of products and for continuing their long-term support.

4. Instead of concealing small product problems and documentation errors, HuMANDATA makes them public.

5. HuMANDATA abides by Japanese law and its spirit. We make no transactions with purchasers who commit illegal acts.

1

ACM

-

021 Series v1.2

 Revision History

Revision HistoryRevision History

Revision History

Date

DateDate

Date

Revision

RevisionRevision

Revision

Descri

DescriDescri

Description

ptionption

ption

Jul. 15, 2009

v1.0 Initial release

Oct. 2, 2009 v1.1 Upgrade a board version from A to B (modify silk

printing)

Update a block diagram in Section 3.2

Feb. 1, 2012 v1.2 Delete Download cable connection example figure

 Introduction

IntroductionIntroduction

Introduction

Thank you for buying our product ACM-021.

This is an evaluation board equipped with an Altera Cyclone III, power, reset, and

clock circuit and configuration device.

It can provide you with very convenient and easy-to-use environment.

2

ACM

-

021 Series v1.2

1.

1.1.

1. Unused Pins

Unused Pins Unused Pins

Unused Pins [IMPORTANT]

[IMPORTANT][IMPORTANT]

[IMPORTANT]

Some unused I/O pins are connected to GND or VCCINT (1.2 V).

Smaller FPGAs use those pins as general-purpose I/Os, but larger FPGAs use those

pins as GND or VCC.

Therefore, they must be set as “As input tri-stated”.

If you forget to set the pins properly, large current will flow and damage FPGA and

peripheral circuit.

To set the unused I/O pins follow the steps below:

1. Open “Assignments” and click “Device…”

2. Click “Device & Pin Options…” button

3. Open “Unused Pins” tab

4. Set Reserve all unused pins as “As input tri-stated”

3

ACM

-

021 Series v1.2

2.

2.2.

2. Specifications

SpecificationsSpecifications

Specifications

Model Name

Model NameModel Name

Model Name

ACM-021-16C8 ACM-021-40C8 ACM-021-55C8

FPGA

FPGAFPGA

FPGA

EP3C16F484C8N

EP3C40F484C8N

EP3C55F484C8N

Configuration Device

Configuration DeviceConfiguration Device

Configuration Device

EPCS16SI16N (ALTERA)

User I/Os

User I/OsUser I/Os

User I/Os

100

On

OnOn

On-

--

-Board Clock

Board ClockBoard Clock

Board Clock

30 [MHz], 18.432 [MHz] (External inputs are available)

User Switches

User SwitchesUser Switches

User Switches

2 (Push buttons)

User LEDs

User LEDsUser LEDs

User LEDs

2

Status LEDs

Status LEDsStatus LEDs

Status LEDs

2 (POWER, DONE)

Power

PowerPower

Power-

--

-On Reset

On ResetOn Reset

On Reset

200 [ms] typ. (Configuration Reset Signal)

JTAG Connector

JTAG ConnectorJTAG Connector

JTAG Connector

DIL 10-pin socket, 2.54 [mm] pitch

Power Input

Power InputPower Input

Power Input

DC 3.3 [V]

(Internal power is generated by an on-board regulator.)

PCB

PCBPCB

PCB

6 Layer FR-4 t1.6 [mm] Immersion gold

Dimensions

DimensionsDimensions

Dimensions

3.386" x 2.126" (86 x 54 [mm])

Weight

WeightWeight

Weight

27 [g] typ.

User I/O Connectors

User I/O ConnectorsUser I/O Connectors

User I/O Connectors

66-pin through-hole

dia. 0.9 [mm], 100[mil]/2.54 [mm] pitch

Accessories

AccessoriesAccessories

Accessories

DIL 10-pin header (Mounted)

2 DIL 80-pin headers (Cuttable)

RoHS Compliance

RoHS ComplianceRoHS Compliance

RoHS Compliance

YES

* There may be cases when compatible parts are used.

* There may be cases when compatible parts are used.* There may be cases when compatible parts are used.

* There may be cases when compatible parts are used.

4

ACM

-

021 Series v1.2

3.

3.3.

3. Overview

OverviewOverview

Overview

3.1.

3.1.3.1.

3.1. Name of Parts

Name of PartsName of Parts

Name of Parts

Component Side

Component SideComponent Side

Component Side

Solder Side

Solder SideSolder Side

Solder Side

FPGA

Powe

r & POR

User Switches

User I/Os CNB

User I/Os CNA

Oscillator

30 MHz

50MHz

JTAG

User LED

DONE LED

Power LED

Config. Switch

Config. Memory

Serial I/F

5

ACM

-

021 Series v1.2

3.2.

3.2.3.2.

3.2. Block

Block Block

Block Diagram

DiagramDiagram

Diagram

Cyclone-III

Cyclone-IIICyclone-III

Cyclone-III

EP3C16/40/55

EP3C16/40/55EP3C16/40/55

EP3C16/40/55

F484C8N

F484C8NF484C8N

F484C8N

Power Circuit

Power CircuitPower Circuit

Power Circuit

2.5 V

2.5 V2.5 V

2.5 V

1.2 V

1.2 V1.2 V

1.2 V

Power LED

Power LEDPower LED

Power LED

(3.3 V)

(3.3 V)(3.3 V)

(3.3 V)

DONE LED

DONE LEDDONE LED

DONE LED

Config. Device

Config. DeviceConfig. Device

Config. Device

EPCS16

EPCS16EPCS16

EPCS16

(16 Mbit)

(16 Mbit)(16 Mbit)

(16 Mbit)

User I/Os CNB

User I/Os CNBUser I/Os CNB

User I/Os CNB

VIO(B) INPUT

VIO(B) INPUTVIO(B) INPUT

VIO(B) INPUT External CLK

External CLKExternal CLK

External CLK

User I/Os CNA

User I/Os CNAUser I/Os CNA

User I/Os CNA

3.3 V INPUT

3.3 V INPUT3.3 V INPUT

3.3 V INPUT External CLK

External CLKExternal CLK

External CLK

nCONFIG

nCONFIGnCONFIG

nCONFIG

Power-On Reset

Power-On ResetPower-On Reset

Power-On Reset

Typ. 200ms

Typ. 200msTyp. 200ms

Typ. 200ms

Config. Switch

Config. SwitchConfig. Switch

Config. Switch

JTAG

JTAGJTAG

JTAG

JTAGJTAG

JTAG

Buffer

BufferBuffer

Buffer

.JIC

Oscillator

OscillatorOscillator

Oscillator

30 MHz

30 MHz30 MHz

30 MHz

50 MHz

50 MHz50 MHz

50 MHz

User LED

User LEDUser LED

User LED

User Switch

User SwitchUser Switch

User Switch

50

5050

50

5050

50

3.3.

3.3.3.3.

3.3. Power Supply

Power SupplyPower Supply

Power Supply

This board operates from single DC 3.3 V power supply.

The external power supply should be sufficient and stabilized.

Please apply power to CNA and CNB with thick print

pattern or cable. Please connect all ground pins.

Notes

NotesNotes

Notes

6

ACM

-

021 Series v1.2

3.4.

3.4.3.4.

3.4. JTAG Connector

JTAG ConnectorJTAG Connector

JTAG Connector

This connector is used to configure the FPGA and program the configuration device

in-system.

Pin assignment is as follows.

CN2

CN2CN2

CN2

Net Label

Net LabelNet Label

Net Label

Signal Name

Signal NameSignal Name

Signal Name

JTAG Pin

JTAG PinJTAG Pin

JTAG Pin

Signal Name

Signal NameSignal Name

Signal Name

Net Label

Net LabelNet Label

Net Label

XTCK TCK 1 2 GND GND

XTDO TDO 3 4 VCC (3.3 V)

V33A

XTMS TMS 5 6 - -

- - 7 8 - -

XTDI TDI 9 10 GND GND

You can use Altera download cable. (ByteBlaster [II/MV] or USB Blaster)

Please pay attention not to attach cables in reverse.

1

11

1

2

22

2

9

99

9

10

1010

10

Notice

NoticeNotice

Notice

7

ACM

-

021 Series v1.2

4.

4.4.

4. Configuration Switch

Configuration SwitchConfiguration Switch

Configuration Switch

SW1 is used to set FPGA’s MSEL0, MSEL1, MSEL2 and MSEL3.

Position No.

Position No.Position No.

Position No.

1

11

1

2

22

2

3

33

3

4

44

4

5

55

5

6

66

6

7

77

7

8

88

8

Net La

Net LaNet La

Net Label

belbel

bel

MSEL0

MSEL1

MSEL2

MSEL3

DSW4

DSW5

DSW6

DSW7

Default

DefaultDefault

Default

OFF OFF OFF OFF OFF OFF OFF OFF

Function

FunctionFunction

Function

Configuration Mode User Switch

MSEL0

MSEL0MSEL0

MSEL0

MSEL

MSELMSEL

MSEL1

11

1

MSEL

MSELMSEL

MSEL2

22

2

MSEL

MSELMSEL

MSEL3

33

3

PS

PSPS

PS

Mode

ModeMode

Mode

0 0 0 0

AS More

AS MoreAS More

AS More

0 1 0 0

JTAG

JTAGJTAG

JTAG

1 1 1 1

AS mode (Configuration Device access): SW1 (1, 3, 4 ON)

MSEL0 = 0

MSEL1 = 1

MSEL2 = 0

MSEL3 = 0

JTAG mode : SW1 ( Any setting )

MSEL0 = Any

MSEL1 = Any

MSEL2 = Any

MSEL3 = Any (Default)

For more detail, please see an Altera’s latest datasheet.

Notes

NotesNotes

Notes

8

ACM

-

021 Series v1.2

5.

5.5.

5. FPGA Configuration

FPGA ConfigurationFPGA Configuration

FPGA Configuration

To configure the FPGA via JTAG, please refer to the following steps.

1. Open [Tools]

[Tools] [Tools]

[Tools] menu, then click

[Programmer]

[Programmer][Programmer]

[Programmer].

2. Select [JTAG]

[JTAG] [JTAG]

[JTAG] from [Mode]

[Mode][Mode]

[Mode] list.

3. Open [Processing]

[Processing][Processing]

[Processing] menu, then click [Auto Detect].

[Auto Detect].[Auto Detect].

[Auto Detect].

4. Double-click [none]

[none][none]

[none] and select the sof file

sof filesof file

sof file you made.

5. Check [Program/Configure]

[Program/Configure] [Program/Configure]

[Program/Configure] and

[Verify].

[Verify].[Verify].

[Verify].

6. Open [Processing]

[Processing] [Processing]

[Processing] menu, then click

[Start]

[Start][Start]

[Start].

If configuration is completed successfully, the DONE LED will light up.

Advice

 Check if FPGA device name you set is same as that on the board.

 Please check unused pins setting. (See section.1)

 Quartus II help will give you more information.

6.

6.6.

6. Configuration Device Programming

Configuration Device ProgrammingConfiguration Device Programming

Configuration Device Programming

To program the configuration device via JTAG , you need to prepare jic (JTAG

Indirect Configuration) file. You can generate jic file from sof file using Quartus II.

Please refer to the following steps.

 Generating jic file

1. Open [File]

[File] [File]

[File] menu, then click

[

[[

[Convert

ConvertConvert

Convert

Programming Files].

Programming Files].Programming Files].

Programming Files].

2. Select [JTAG Indirect Configuration File]

[JTAG Indirect Configuration File][JTAG Indirect Configuration File]

[JTAG Indirect Configuration File] from [Programming file type]

[Programming file type][Programming file type]

[Programming file type] list.

3. Select the device name which on the board from [Configuration dev

[Configuration dev[Configuration dev

[Configuration device]

ice]ice]

ice] list.

4. Fill the [File name]

[File name][File name]

[File name] as you like.

5. Click [Add Device]

[Add Device][Add Device]

[Add Device], then select [Device family]

[Device family][Device family]

[Device family] and [Device name]

[Device name][Device name]

[Device name].

6. Click [Add File

[Add File[Add File

[Add File…

……

…]

]]

], then select the sof file

sof filesof file

sof file for input file.

7. Click [Generate].

[Generate].[Generate].

[Generate].

 Programming Configuration Device

8. Open [Tools]

[Tools] [Tools]

[Tools] menu, then click

[Pr

[Pr[Pr

[Programmer]

ogrammer]ogrammer]

ogrammer].

9. Select [JTAG]

[JTAG] [JTAG]

[JTAG] from [Mode]

[Mode][Mode]

[Mode] list.

..

.

10. Open [Processing]

[Processing][Processing]

[Processing] menu, then click [Auto Detect].

[Auto Detect].[Auto Detect].

[Auto Detect].

11. Select the jic file

jic filejic file

jic file you made.

12. Check [Program/Configure]

[Program/Configure] [Program/Configure]

[Program/Configure] and

[Verify]

[Verify][Verify]

[Verify]

13. Open [Processing]

[Processing] [Processing]

[Processing] menu, then click [Start]

[Start][Start]

[Start].

9

ACM

-

021 Series v1.2

After programming is completed successfully, turn off and on the power.

Configuration data in the configuration device will be automatically loaded into the

FPGA.

Advice

 Check if the configuration device name, FPGA device family name and

device name you selected in step 3 and 5 are same as those on the board.

 Quartus II help will give you more information.

7.

7.7.

7. Additional Documentation and User Support

Additional Documentation and User SupportAdditional Documentation and User Support

Additional Documentation and User Support

The following documents and other supports are available at

http://www.hdl.co.jp/en/

http://www.hdl.co.jp/en/http://www.hdl.co.jp/en/

http://www.hdl.co.jp/en/spc/ACM/acm

spc/ACM/acmspc/ACM/acm

spc/ACM/acm-

--

-02

0202

021/

1/1/

1/

 Circuit Schematic

 Pin List

 Dimensional drawing

 PCB drawing

 Net List

… and more.

Cyclone III FPGA Board

Cyclone III FPGA BoardCyclone III FPGA Board

Cyclone III FPGA Board

ACM-021 Series

User’s Manual

Ver. 1.2

Ver. 1.2Ver. 1.2

Ver. 1.2

................................

................................................................

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...............

Feb

FebFeb

Feb.

. .

. 1

11

1, 20

, 20, 20

, 2012

1212

12

HuMANDATA LTD.

HuMANDATA LTD.HuMANDATA LTD.

HuMANDATA LTD.

Address: 1-2-10-2F, Nakahozumi, Ibaraki

Osaka, Japan

ZIP 567-0034

Tel: 81-72-620-2002 (Japanese)

Fax: 81-72-620-2003 (Japanese/English)

URL: http://www.hdl.co.jp/en/ (Global)

http://www.hdl.co.jp/ (Japan)

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