Basler aviator
CAMERA LINK INFORMATION FOR FRAME
GRABBER DESIGNERS
Document Number: AW000831
Version: 08 Language: 000 (English)
Release Date: 23 October 2013
For customers in the U.S.A.
This equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection
against harmful interference when the equipment is operated in a commercial environment. This
equipment generates, uses, and can radiate radio frequency energy and, if not installed and used
in accordance with the instruction manual, may cause harmful interference to radio
communications. Operation of this equipment in a residential area is likely to cause harmful
interference in which case the user will be required to correct the interference at his own expense.
You are cautioned that any changes or modifications not expressly approved in this manual could
void your authority to operate this equipment.
The shielded interface cable recommended in this manual must be used with this equipment in
order to comply with the limits for a computing device pursuant to Subpart J of Part 15 of FCC Rules.
For customers in Canada
This apparatus complies with the Class A limits for radio noise emissions set out in Radio
Interference Regulations.
Pour utilisateurs au Canada
Cet appareil est conforme aux normes Classe A pour bruits radioélectriques, spécifiées dans le
Règlement sur le brouillage radioélectrique.
Life Support Applications
These products are not designed for use in life support appliances, devices, or systems where
malfunction of these products can reasonably be expected to result in personal injury. Basler
customers using or selling these products for use in such applications do so at their own risk and
agree to fully indemnify Basler for any damages resulting from such improper use or sale.
Warranty Note
Do not open the housing of the camera. The warranty becomes void if the housing is opened.
All material in this publication is subject to change without notice and is copyright Basler
AG.
Contacting Basler Support Worldwide
Europe:
Basler AG
An der Strusbek 60-62
22926 Ahrensburg
Germany
Tel.: +49-4102-463-515
Fax.: +49-4102-463-599
Americas:
Basler, Inc.
855 Springdale Drive, Suite 203
Exton, PA 19341
U.S.A.
Tel.: +1-610-280-0171
Fax.: +1-610-280-7608
Asia:
Basler Asia Pte. Ltd.
35 Marsiling Industrial Road 3
# 05 - 06
Singapore 739257
Tel.: +65 6367 1355
Fax.: +65 6367 1255
www.baslerweb.com
AW00083108000 Table of Contents
Basler aviator Camera Link i
Table of Contents
1 Camera Link Implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Pin Assignments and Numbering for the MDR Connector . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Camera Link Input Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.1 Serial to Camera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.2 External Acquisition Start Trigger (ExASTrig) . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.3 External Frame Start Trigger (ExFSTrig) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Camera Link Output Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.1 Pixel Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.2 Frame Valid Bit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.3 Line Valid Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.4 Data Valid Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.5 Pixel Data Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Pixel Data Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Data Depth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Pixel Data Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Camera Link Tap Geometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3.1 1X-1Y Tap Geometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3.2 1X2-1Y Tap Geometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.3 1X-2YE Tap Geometry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table of Contents AW00083108000
ii Basler aviator Camera Link
AW00083108000 Camera Link Implementation
Basler aviator Camera Link 1
1 Camera Link Implementation
The Basler aviator Camera Link camera transmits Camera Link data in a fashion similar to a
National Semiconductor DS90CR287 device. For Camera Link receivers on your frame grabber, we
recommend that you use a National Semiconductor DS90CR288, a National Semiconductor
DS90CR288A or an equivalent.
The camera uses a National Semiconductor DS90LV048A differential line receiver to receive the
RS-644 camera control input signals and the serial communication input signal defined in the
Camera Link specification. A DS90LV011A differential line transmitter is used to transmit the serial
communication output signal defined in the specification.
Detailed data sheets for these components are available at the National Semiconductor web site
(www.national.com). The data sheets contain all of the information, including application notes, that
you need to implement Camera Link,
All camera models have a single MDR connector and implement the "base configuration" as defined
in the Camera Link specification. The cameras include a differential line transmitter circuit
designated as transmitter circuit X. When a camera is set for a 2 tap video data output mode, it uses
the base Camera Link configuration.
Table 1 on page 2 shows the pin assignments for the MDR connector.
The schematic in Figure 1 on page 3 shows the base configuration Camera Link implementation for
the camera and a typical implementation for a base configuration frame grabber
Camera Link Implementation AW00083108000
2 Basler aviator Camera Link
1.1 Pin Assignments and Numbering for the
MDR Connector
The pin assignments and numbering for the MDR connector on the camera are as shown in Table 1.
1
Pins 1, 13, 14, and 26 are all tied to ground inside of the camera.
Pin Number Signal Name Direction Level Function
1, 13, 14, 26
1
Gnd Input Ground Ground for the inner shield of the cable
2 X0- Output Camera Link
LVDS
Data from transmitter circuit X
15 X0+
3 X1- Output Camera Link
LVDS
Data from transmitter circuit X
16 X1+
4 X2- Output Camera Link
LVDS
Data from transmitter circuit X
17 X2+
6 X3- Output Camera Link
LVDS
Data from transmitter circuit X
19 X3+
5 XClk- Output Camera Link
LVDS
Pixel clock from transmitter circuit X
18 XClk+
7 SerTC+ Input RS-644
LVDS
Serial communication data receive
(SerTC = "serial to camera")
20 SerTC-
8 SerTFG- Output RS-644
LVDS
Serial communication data transmit
(SerTFG = "serial to frame grabber")
21 SerTFG+
9 CC1- Input RS-644
LVDS
ExFrameStTrig (external frame start trigger)
22 CC1+
10 CC2+ Input RS-644
LVDS
Not assigned
23 CC2-
11 None None None None
24 None
12 CC4+ Input RS-644
LVDS
Not assigned
25 CC4-
Table 1: Pin Assignments for MDR Connector One
1
26
14
13
AW00083108000 Camera Link Implementation
Basler aviator Camera Link 3
Fig. 1: Camera / Frame Grabber Interface
Camera Link Implementation AW00083108000
4 Basler aviator Camera Link
1.2 Camera Link Input Signals
The input signals that the camera can accept via the Camera Link interface include a Serial to
Camera signal and an External Frame Start Trigger signal as described below.
1.2.1 Serial to Camera
The Serial To Camera (SerTC) input signal is an RS-644 LVDS signal as specified in the Camera
Link standard. The signal is input to the camera on pins 7 and 20 of MDR connector one as specified
in the standard and as shown in Figure 1 on page 3. The camera is equipped for RS-644 serial
communication via a serial port integrated into the frame grabber as specified in the Camera Link
standard.
The RS-644 serial connection in the Camera Link interface is used to issue commands to the
camera that change parameter values. The serial link can also be used to query the camera about
its current setup.
1.2.2 External Acquisition Start Trigger (ExASTrig)
The camera can be set to accept an External Acquisition Start Trigger (ExASTrig) input signal,
which is used as an enabler for the frame start trigger. When the camera receives a proper
ExASTrig signal, its acquisition status will change from "waiting for acquisition start trigger" to
"waiting for frame start trigger". For details about using an acquisition start trigger with aviator
cameras, refer to the aviator User’s Manual (AW000830xx000).
When the ExASTrig signal is applied to the camera via the Camera Link interface, it must be an
LVDS signal as specified for RS-644. The camera can be programmed to accept an ExASTrig
signal on the CC1, CC2, or CC4 inputs in the Camera Link interface.
Note that ExASTrig is edge sensitive and therefore must toggle. The minimum high time for the
ExASTrig signal is 1 µs and the minimum low time is also 1 µs.
1.2.3 External Frame Start Trigger (ExFSTrig)
The camera can be set to accept an External Frame Start Trigger (ExFSTrig) input signal to control
exposure and readout of the camera’s sensor. When the ExFSTrig signal is applied to the camera
via the Camera Link interface, it is an LVDS signal as specified for RS-644. By default, the camera
will accept an ExFSTrig signal on the CC1 input in the Camera Link interface (pins 9 and 22 of the
MDR connector) as specified in the Camera Link standard. The camera can also be programmed
to accept the ExFSTrig signal on CC2 or CC4.
AW00083108000 Camera Link Implementation
Basler aviator Camera Link 5
When the camera is under the control of an ExFSTrig signal, it can be programmed to function in
two exposure time control modes: timed or trigger width. ExFSTrig can be a periodic or non-periodic
function. The frequency of the ExFSTrig signal determines the camera’s frame rate in these modes.
Note that ExFSTrig is edge sensitive and therefore must toggle. The minimum high time for the
ExFSTrig signal is 1 µs and the minimum low time is also 1 µs.
The ExFSTrig signal is typically supplied to the camera by the frame grabber board.
For details about using a frame start trigger with aviator cameras, refer to the aviator User’s Manual
(AW000830xx000).
Camera Link Implementation AW00083108000
6 Basler aviator Camera Link
1.3 Camera Link Output Signals
1.3.1 Pixel Clock
The pixel clock is assigned to the strobe port (TxClk pin) on transmitter circuit X as defined in the
Camera Link standard and as shown in Table 1 on page 2. The pixel clock is used to time the
sampling and transmission of pixel data. The frequency of the pixel clock is selectable, see the
aviator user’s manual for details.
On each rising edge of the pixel clock signal, the data for two pixels are transmitted at 12 bit, 10 bit,
or 8 bit depth depending on the camera’s current pixel format setting.
1.3.2 Frame Valid Bit
As shown in Figure 3 on page 12, the frame valid bit indicates that a valid frame is being
transmitted. The frame valid bit is assigned to the frame valid port on transmitter circuit X as defined
in the Camera Link standard. Pixel data is only valid when the frame valid, line valid, and data valid
bits are all high.
1.3.3 Line Valid Bit
As shown in Figure 3 on page 12, the line valid bit indicates that a valid line is being transmitted.
The line valid bit is assigned to the line valid port on transmitter circuit X as defined in the Camera
Link standard. Pixel data is only valid when the frame valid, line valid, and data valid bits are all high.
1.3.4 Data Valid Bit
As shown in Figure 3 on page 12, the data valid bit indicates that valid pixel data is being
transmitted. The data valid bit is assigned to the data valid port on transmitter circuit X as defined
in the Camera Link standard. Pixel data is only valid when the frame valid, line valid, and data valid
bits are all high.
1.3.5 Pixel Data Bits
Pixel data bits are transmitted via output ports on transmitter circuit X. The ports as defined in the
Camera Link standard are shown in Figure 1 on page 3. The assignment of pixel data bits to output
ports varies depending on the current pixel format setting of the camera. The available pixel formats
and the bit assignments are shown in detail in Table 2. The bit assignments comply with the Camera
Link standard.
AW00083108000 Camera Link Implementation
Basler aviator Camera Link 7
MDR Conn. 1, Transmitter Circuit X
Port Camera Frame
Grabber
Bit Assignments
2 Tap - 12 Bit 2 Tap - 10 Bit 2 Tap - 8 Bit
Port A0 TxIN0 RxOut0 D0 Bit 0 D0 Bit 0 D0 Bit 0
Port A1 TxIN1 RxOut1 D0 Bit 1 D0 Bit 1 D0 Bit 1
Port A2 TxIN2 RxOut2 D0 Bit 2 D0 Bit 2 D0 Bit 2
Port A3 TxIN3 RxOut3 D0 Bit 3 D0 Bit 3 D0 Bit 3
Port A4 TxIN4 RxOut4 D0 Bit 4 D0 Bit 4 D0 Bit 4
Port A5 TxIN6 RxOut6 D0 Bit 5 D0 Bit 5 D0 Bit 5
Port A6 TxIN27 RxOut27 D0 Bit 6 D0 Bit 6 D0 Bit 6
Port A7 TxIN5 RxOut5 D0 Bit 7 D0 Bit 7 D0 Bit 7 (MSB)
Port B0 TxIN7 RxOut7 D0 Bit 8 D0 Bit 8 D1 Bit 0
Port B1 TxIN8 RxOut8 D0 Bit 9 D0 Bit 9 (MSB) D1 Bit 1
Port B2 TxIN9 RxOut9 D0 Bit 10 Not Used D1 Bit 2
Port B3 TxIN12 RxOut12 D0 Bit 11 (MSB) Not Used D1 Bit 3
Port B4 TxIN13 RxOut13 D1 Bit 8 D1 Bit 8 D1 Bit 4
Port B5 TxIN14 RxOut14 D1 Bit 9 D1 Bit 9 (MSB) D1 Bit 5
Port B6 TxIN10 RxOut10 D1 Bit 10 Not Used D1 Bit 6
Port B7 TxIN11 RxOut11 D1 Bit 11(MSB) Not Used D1 Bit 7 (MSB)
Port C0 TxIN15 RxOut15 D1 Bit 0 D1 Bit 0 Not Used
Port C1 TxIN18 RxOut18 D1 Bit 1 D1 Bit 1 Not Used
Port C2 TxIN19 RxOut19 D1 Bit 2 D1 Bit 2 Not Used
Port C3 TxIN20 RxOut20 D1 Bit 3 D1 Bit 3 Not Used
Port C4 TxIN21 RxOut21‘ D1 Bit 4 D1 Bit 4 Not Used
Port C5 TxIN22 RxOut22 D1 Bit 5 D1 Bit 5 Not Used
Port C6 TxIN16 RxOut16 D1 Bit 6 D1 Bit 6 Not Used
Port C7 TxIN17 RxOut17 D1 Bit 7 D1 Bit 7 Not Used
LVAL TxIN24 RxOut24 Line Valid Line Valid Line Valid
FVAL TxIN25 RxOut25 Frame Valid Frame Valid Frame Valid
DVAL TxIN26 RxOut26 Data Valid Data Valid Data Valid
Spare TxIN23 RxOut23 Not Used Not Used Not Used
Strobe TxINCLK RxOutClk Pixel Clock Pixel Clock Pixel Clock
Table 2: Bit Assignments for Two Tap Output Modes (Transmitter Circuit X)
Camera Link Implementation AW00083108000
8 Basler aviator Camera Link
AW00083108000 Pixel Data Output
Basler aviator Camera Link 9
2 Pixel Data Output
2.1 Data Depth
The camera’s Pixel Format parameter setting determines the data depth of the pixels transmitted
from the camera.
On mono cameras, the pixel format can be set to Mono 12 (12 bit depth), Mono 10 (10 bit depth),
or Mono 8 (8 bit depth).
On color cameras, the pixel format can be set to Bayer GR 12 (12 bit depth), Bayer GR 10 (10 bit
depth), or Bayer GR 8 (8 bit depth).
When the camera is set for
12 bit depth, all 12 bits of pixel data output from the camera’s ADCs are transmitted.
10 bit depth, the 2 least significant bits output from each ADC are dropped and the 10 most
significant bits of data per pixel are transmitted.
8 bit depth, the 4 least significant bits output from each ADC are dropped and the 8 most
significant bits of data per pixel are transmitted.
2.2 Pixel Data Output Timing
The Camera Link pixel clock speed on all aviator Camera Link models is selectable. The available
pixel clock speeds are shown in Table 3.
Camera Link Pixel Clock Setting pclk
20 MHz 50.000 ns
32.5 MHz 30.769 ns
40 MHz 25.000 ns
48 MHZ 20.083 ns
65 MHz 15.385 ns
Table 3: Pixel Clock Speeds and Periods
Pixel Data Output AW00083108000
10 Basler aviator Camera Link
2.3 Camera Link Tap Geometry
All aviator cameras have a settable Camera Link Tap Geometry parameter. The Camera Link tap
geometry setting determines how pixel data will be read out of the camera’s image buffer and
transmitted via the Camera link interface.
On all Basler aviator cameras, the Camera Link tap geometry can be set to
1X-1Y, 1X2-1Y or to 1X-2YE.
AW00083108000 Pixel Data Output
Basler aviator Camera Link 11
2.3.1 1X-1Y Tap Geometry
After an image has been captured, the image is read out of the camera’s imaging sensor and into
an image buffer. As pixel data is read out of the sensor and into the buffer, it is reordered so that the
pixel data for each line is in sequential ascending order from pixel 1 through the last pixel in the line.
When a camera is set for the 1X-1Y tap geometry, transmission of the pixel data from the camera’s
image buffer to the frame grabber in the host PC will not begin until the entire image has been read
out of the sensor and buffered.
The 1X-1Y geometry
is a "one tap Camera Link configuration"
can be used, if the camera is set for either one tap sensor digitization or four tap sensor
digitization.
Figure 2 provides a graphical illustration of how the pixel data is transmitted from the image buffer
for 1X-1Y tap geometry. The text following Figure 2 provides a word description of how the pixel
data is transmitted.
The pixel clock is used to time data transmission. As shown in Figure 3 on page 12, the camera
transmits data on each rising edge of the pixel clock.
Fig. 2: 1X-1Y Tap Geometry
Tap 1
X
1
Y
1
X
1
Y
2
X
1
Y
H-1
X
1
Y
H
X
2
Y
1
X
2
Y
2
X
2
Y
H-1
X
2
Y
H
X
W-1
Y
1
X
W-1
Y
2
X
W-1
Y
H-1
X
W-1
Y
H
X
W
Y
1
X
W
Y
2
X
W
Y
H-1
X
W
Y
H
W = width
H = height
Pixel Data Output AW00083108000
12 Basler aviator Camera Link
Pixel Data Transmission Sequence with the 1X-1Y Tap Geometry
When the camera is not transmitting valid data, the frame valid, line valid, and data valid bits sent
on each cycle of the pixel clock will be low. Once the camera has acquired an image and has read
the pixel data out of the imaging sensor, it will begin transmitting the data (see Figure 3):
(1) - (2):
On the pixel clock cycle where frame data transmission begins, the frame valid bit will become
high.
Fig. 3: Pixel Data Output Timing for the 1X-1Y Tap Geometry
(2) - (3):
Two pixel clock cycles later, the line valid and data valid bits will become high and data
transmission for line one begins.
One data stream, D0, is transmitted during this clock cycle. On this clock cycle, data stream D0
will transmit data for pixel 1 in line 1. Depending on the pixel format selected, the pixel data
will be at 12, 10, or 8 bit depth.
On the next pixel clock cycle, the line valid and data valid bits will still be high. On this clock
cycle, data stream D0 will transmit data for pixel 2 in line 1.
On the next pixel clock cycle, the line valid and data valid bits will still be high. On this clock
cycle, data stream D0 will transmit data for pixel 3 in line 1.
This pattern will continue until all of the pixel data for line 1 have been transmitted.
End of
Exposure
Frame
Valid
Line
Valid
Line 1 Line 2 Line H
Pixel
Clock
D0
Pixel Data
(12, 10,or 8 bits)
W-1 W12 1 122
Data
Valid
W-1 W W-1 W
A
B
C
D
E
F
TIMING DIAGRAMS ARE NOT DRAWN TO SCALE.
H = height = the last line in the image (e.g., line 1024 on a camera with the AOI set to 1024 x 1024)
W = width = the last pixel in the line (e.g., pixel 1024 on a camera with the AOI set to 1024 x 1024)
A - F: see next page
(1) (2) (3)
(4)
AW00083108000 Pixel Data Output
Basler aviator Camera Link 13
(3) - (4):
The line valid and data valid bits become low for 8 pixel clock cycles.
On the pixel clock cycle where data transmission for line 2 begins, the line valid and data valid
bits will become high. On this clock cycle, data stream D0 will transmit data for pixel 1 in
line 2.
On the next pixel clock cycle, the line valid and data valid bits will still be high. On this clock
cycle, data stream D0 will transmit data for pixel 2 in line 2.
On the next pixel clock cycle, the line valid and data valid bits will still be high. On this clock
cycle, data stream D0 will transmit data for pixel 3 in line 2.
This pattern will continue until all of the pixel data for line 2 have been transmitted.
Further steps:
The line valid and data valid bits become low for 8 pixel clocks.
The camera will continue to transmit pixel data for each line as described above until all of the
lines in the frame have been transmitted. After all of the lines have been transmitted, the frame
valid, line valid, and data valid bits will all become low indicating that a valid frame is no longer
being transmitted.
A --> varies depending on the camera model as shown in the table below.
B = 2 x pclk E = 6 x pclk
C = CL Inter-line delay value (*) F = [ (AOI Height) x (D + C) ] x pclk
D = [ (AOI Width) ] x pclk
(*) The inter-line delay parameter determines the delay between the end of transmission of a line
and the start of transmission of the next line (within a frame).
Per default the inter-line delay value is set to 4. You can adapt the inter-line delay value to your
requirements.
For information about how to configure the inter-line parameter, see the aviator Camera Link User’s
Manual (AW000830xx000).
avA1000-120km/kc
(at 1024 x 1024)
avA1600-65km/kc
(at 1600 x 1200)
avA1900-60km/kc
(at 1920 x 1080)
avA2300-30km/kc
(at 2330 x 1750)
8.28 ms 14.47 ms 15.30 ms 29.41ms
Pixel Data Output AW00083108000
14 Basler aviator Camera Link
2.3.2 1X2-1Y Tap Geometry
After an image has been captured, the image is read out of the camera’s imaging sensor and into
an image buffer. As pixel data is read out of the sensor and into the buffer, it is reordered so that the
pixel data for each line is in sequential ascending order from pixel 1 through the last pixel in the line.
When a camera is set for the 1X2-1Y tap geometry, transmission of the pixel data from the camera’s
image buffer to the frame grabber in the host PC will not begin until the entire image has been read
out of the sensor and buffered.
The 1X2-1Y tap geometry
is a "two tap Camera Link configuration"
Figure 4 provides a graphical illustration of how the pixel data is transmitted from the image
buffer when the 1X2-1Y tap geometry is selected.
The text following Figure 4 provides a word description of how the pixel data is transmitted.
can be used, if the camera is set for either one tap sensor digitization or four tap sensor
digitization.
The pixel clock is used to time data transmission. As shown in Figure 5 on page 15, the camera
transmits data on each rising edge of the pixel clock. The pixel clock frequency depends on the
current setting of the camera’s Camera Link Clock Speed parameter.
Fig. 4: 1X2-1Y Tap Geometry
Tap 1
Tap 2
X
1
Y
1
X
1
Y
2
X
1
Y
H-1
X
1
Y
H
X
2
Y
1
X
2
Y
2
X
2
Y
H-1
X
2
Y
H
X
W-1
Y
1
X
W-1
Y
2
X
W-1
Y
H-1
X
W-1
Y
H
X
W
Y
1
X
W
Y
2
X
W
Y
H-1
X
W
Y
H
W = width
H = height
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