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NEC
PD750008
NEC PD750008 User manual
Type
User manual
Brand
NEC
Size
1.16 MB
Pages
342
Language
English
Table of contents
COVER
1
GENERAL
21
FUNCTION OVERVIEW
22
ORDERING INFORMATION
23
DIFFERENCES AMONG SUBSERIES PRODUCTS
24
BLOCK DIAGRAM
25
PIN CONFIGURATION [TOP VIEW]
26
PIN FUNCTIONS
29
PIN FUNCTIONS OF THE µPD750008
29
PIN FUNCTIONS
32
P00-P03 [PORT0]
32
P10-P13 [PORT1]
32
P20-P23 [PORT2]
33
P30-P33 [PORT3]
33
P40-P43 [PORT4], P50-P53 [PORT5]
33
P60-P63 [PORT6], P70-P73 [PORT7]
33
P80, P81 [PORT8]
33
TI0
33
PTO0, PTO1
33
PCL
34
BUZ
34
SCK, SO/SB0, SI/SB1
34
INT4
34
INT0, INT1
34
INT2
35
KR0-KR3
35
KR4-KR7
35
X1, X2
35
XT1, XT2
36
RESET
36
V DD
36
V SS
36
IC [for the µPD750004, µPD750006, and µPD750008 only]
37
V PP [for the µPD75P0016 only]
37
MD0-MD3 [for the µPD75P0016 only]
37
PIN INPUT/OUTPUT CIRCUITS
38
CONNECTION OF UNUSED PINS
40
FEATURES OF THE ARCHITECTURE AND MEMORY MAP
41
DATA MEMORY BANK STRUCTURE AND ADDRESSING MODES
41
Data Memory Bank Structure
41
Data Memory Addressing Modes
43
GENERAL REGISTER BANK CONFIGURATION
54
MEMORY-MAPPED I/O
59
NTERNAL CPU FUNCTIONS
65
Mk I MODE/Mk II MODE SWITCH FUNCTIONS
65
Differences between Mk I Mode and Mk II Mode
65
Setting of the Stack Bank Selection Register [SBS]
66
PROGRAM COUNTER [PC]
67
PROGRAM MEMORY [ROM]
68
DATA MEMORY [RAM]
73
Data Memory Configuration
73
Specification of a Data Memory Bank
74
GENERAL REGISTER
76
ACCUMULATOR
77
STACK POINTER [SP] AND STACK BANK SELECT REGISTER [SBS]
78
PROGRAM STATUS WORD [PSW]
82
BANK SELECT REGISTER [BS]
85
PERIPHERAL HARDWARE FUNCTIONS
87
DIGITAL I/O PORTS
87
Types, Features, and Configurations of Digital I/O Ports
88
I/O Mode Setting
94
Digital I/O Port Manipulation Instructions
96
Digital I/O Port Operation
99
Specification of Bilt-in Pull-Up Resistors
101
I/O Timing of Digital I/O Ports
102
CLOCK GENERATOR
104
Clock Generator Configuration
104
Functions and Operations of the Clock Generator
105
System Clock and CPU Clock Setting
114
Clock Output Circuit
116
BASIC INTERVAL TIMER/WATCHDOG TIMER
119
Configuration of the Basic Interval Timer/Watchdog Timer
119
Basic Interval Timer Mode Register [BTM]
119
Watchdog Timer Enable Flag [WDTM]
121
Operation of the Basic Interval Timer
121
Operation of the Watchdog Timer
122
Other Functions
123
CLOCK TIMER
125
Configuration of the Clock Timer
126
Clock Mode Register
126
TIMER/EVENT COUNTER
128
Configuration of Timer/Event Counter
128
8-Bit Timer/Event Counter Mode Operation
134
Notes on Timer/Event Counter Applications
140
SERIAL INTERFACE
143
Serial Interface Functions
143
Configuration of Serial Interface
144
Register Functions
147
Operation Halt Mode
155
Three-Wire Serial I/O Mode Operations
157
Two-Wire Serial I/O Mode
164
SBI Mode Operation
170
Manipulation of SCK Pin Output
199
BIT SEQUENTIAL BUFFER
201
INTERRUPT AND TEST FUNCTIONS
203
CONFIGURATION OF THE INTERRUPT CONTROL CIRCUIT
203
TYPES OF INTERRUPT SOURCES AND VECTOR TABLES
205
VARIOUS DEVICES TO CONTROL INTERRUPT FUNCTIONS
207
INTERRUPT SEQUENCE
215
MULTIPLE INTERRUPT PROCESSING CONTROL
216
PROCESSING OF INTERRUPTS SHARING A VECTOR ADDRESS
218
MACHINE CYCLES FOR STARTING INTERRUPT PROCESSING
220
EFFECTIVE USE OF INTERRUPTS
222
INTERRUPT APPLICATIONS
222
TEST FUNCTION
230
Test Sources
230
Hardware to Control Test Functions
230
STANDBY FUNCTION
235
SETTING OF STANDBY MODES AND OPERATION STATUS
236
RELEASE OF THE STANDBY MODES
237
OPERATION AFTER A STANDBY MODE IS RELEASED
239
SELECTION OF A MASK OPTION
240
APPLICATIONS OF THE STANDBY MODES
240
RESET FUNCTION
245
WRITING TO AND VERIFYING PROGRAM MEMORY [PROM]
249
OPERATING MODES WHEN WRITING TO AND VERIFYING THE PROGRAM MEMORY
250
WRITING TO THE PROGRAM MEMORY
250
READING THE PROGRAM MEMORY
252
SCREENING OF ONE-TIME PROM
253
MASK OPTION
255
PIN
255
MASK OPTION OF STANDBY FUNCTION
255
MASK OPTION FOR FEEDBACK RESISTOR OF SUBSYSTEM CLOCK
256
INSTRUCTION SET
257
UNIQUE INSTRUCTIONS
257
GETI Instruction
257
Bit Manipulation Instructions
258
String-Effect Instructions
258
Number System Conversion Instructions
259
Skip Instructions and the Number of Machine Cycles Required for a Skip
260
INSTRUCTION SET AND OPERATION
261
INSTRUCTION CODES OF EACH INSTRUCTION
278
FUNCTIONS AND APPLICATIONS OF THE INSTRUCTIONS
284
Transfer Instructions
284
Table Reference Instructions
290
Bit Transfer Instructions
293
Arithmetic/Logical Instructions
293
Accumulator Manipulation Instructions
299
Increment/Decrement Instructions
299
Compare Instructions
300
Carry Flag Manipulation Instructions
301
Memory Bit Manipulation Instructions
302
Branch Instructions
304
Subroutine Stack Control Instructions
309
Interrupt Control Instructions
313
I/O Instructions
314
CPU Control Instructions
315
Special Instructions
315
APPENDIX
319
FUNCTIONS OF THE µPD75008, µPD750008, AND µPD75P0016
319
DEVELOPMENT TOOLS
321
MASKED ROM ORDERING PROCEDURE
329
INSTRUCTION INDEX
331
D1 INSTRUCTION INDEX [BY FUNCTION]
331
D2 INSTRUCTION INDEX [ALPHABETICAL ORDER]
334
HARDWARE INDEX
337
E1 HARDWARE INDEX [ALPHABETICAL ORDER WITH RESPECT TO THE HARDWARE NAME]
337
E2 HARDWARE INDEX [ALPHABETICAL ORDER WITH RESPECT TO THE HARDWARE SYMBOL]
339
REVISION HISTORY
341
View document
NEC PD750008 User manual
Type
User manual
Brand
NEC
Size
1.13 MB
Category
Processors
Pages
342
Language
English
View document